Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1165469AbdDXGXT (ORCPT ); Mon, 24 Apr 2017 02:23:19 -0400 Received: from mx2.suse.de ([195.135.220.15]:50772 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1165386AbdDXGXL (ORCPT ); Mon, 24 Apr 2017 02:23:11 -0400 Subject: Re: [PATCH v3 09/11] x86/xen: use capabilities instead of fake cpuid values for xsave To: Boris Ostrovsky , Andrew Cooper , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org References: <20170418063119.11654-1-jgross@suse.com> <20170418063119.11654-10-jgross@suse.com> <12028326-0f19-9430-d8b7-a376facf8749@suse.com> <11745477-7dbb-cc36-1d14-f6cac9b0d13b@oracle.com> From: Juergen Gross Message-ID: Date: Mon, 24 Apr 2017 08:23:09 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <11745477-7dbb-cc36-1d14-f6cac9b0d13b@oracle.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1916 Lines: 51 On 21/04/17 16:51, Boris Ostrovsky wrote: > On 04/21/2017 10:45 AM, Andrew Cooper wrote: >> On 21/04/17 15:38, Juergen Gross wrote: >>> On 21/04/17 16:24, Boris Ostrovsky wrote: >>>>> +static bool __init xen_check_xsave(void) >>>>> { >>>>> - unsigned int ax, bx, cx, dx; >>>>> - unsigned int xsave_mask; >>>>> + unsigned int err, eax, edx; >>>>> >>>>> - ax = 1; >>>>> - cx = 0; >>>>> - cpuid(1, &ax, &bx, &cx, &dx); >>>>> + /* Test OSXSAVE capability via xgetbv instruction. */ >>>>> + asm volatile("1: .byte 0x0f,0x01,0xd0\n\t" /* xgetbv */ >>>>> + "xor %[err], %[err]\n" >>>>> + "2:\n\t" >>>>> + ".pushsection .fixup,\"ax\"\n\t" >>>>> + "3: movl $1,%[err]\n\t" >>>>> + "jmp 2b\n\t" >>>>> + ".popsection\n\t" >>>>> + _ASM_EXTABLE(1b, 3b) >>>>> + : [err] "=r" (err), "=a" (eax), "=d" (edx) >>>>> + : "c" (0)); >>>> Have you tested this on processors where we actually trap on xgetbv? >>>> >>>> I have an AMD box without XSAVE support and this is a fatal error. I >>>> suspect it's too early to use exception fixup framework here. >>> Uuh, too bad. >>> >>> Then I fear we must use the other solution Andrew didn't like. :-( >>> Andrew, would you be okay with that? >> Hmm fine. The status quo is probably best then to unblock this series. >> >> As an independent question, why are exceptions set up so late? They >> really should be the very first thing done > > It's exception fixup that is not set up yet --- we are executing here > before "main" kernel's entry point. > > This is somewhat similar to what > arch/x86/kernel/head_64.S:early_idt_handler_common() does --- it has > special handling for early fixup --- early_fixup_exception(). > > I wonder though --- can this feature masking be deferred until a bit later? At least the xsave feature is tested rather early: it is needed in early_cpu_init() being called way before trap_init(). Juergen