Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1170122AbdDXMpj (ORCPT ); Mon, 24 Apr 2017 08:45:39 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:8081 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1169129AbdDXMpd (ORCPT ); Mon, 24 Apr 2017 08:45:33 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 24 Apr 2017 05:41:28 -0700 Subject: Re: [PATCH V3 4/4] soc/tegra: pmc: Use the new reset APIs to manage reset controllers To: Vivek Gautam , , , References: <1492514488-27385-1-git-send-email-vivek.gautam@codeaurora.org> <1492514488-27385-5-git-send-email-vivek.gautam@codeaurora.org> CC: , , , , , , Thierry Reding From: Jon Hunter Message-ID: Date: Mon, 24 Apr 2017 13:45:20 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <1492514488-27385-5-git-send-email-vivek.gautam@codeaurora.org> X-Originating-IP: [10.26.11.190] X-ClientProxiedBy: DRUKMAIL102.nvidia.com (10.25.59.20) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 567 Lines: 17 On 18/04/17 12:21, Vivek Gautam wrote: > Make use of reset_control_array_*() set of APIs to manage > an array of reset controllers available with the device. Before we apply this patch, I need to check to see if the order of the resets managed by the PMC driver matter. Today the order of the resets is determined by the order they appear in the DT node and although the new APIs work in the same way they do not guarantee this. So let me check to see if we can any concerns about ordering here. Otherwise would be nice to use these APIs. Cheers Jon -- nvpublic