Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S980303AbdDYDTJ (ORCPT ); Mon, 24 Apr 2017 23:19:09 -0400 Received: from mail.netline.ch ([148.251.143.178]:54523 "EHLO netline-mail3.netline.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S980289AbdDYDTA (ORCPT ); Mon, 24 Apr 2017 23:19:00 -0400 Subject: Re: [PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format To: Gerd Hoffmann Cc: dri-devel@lists.freedesktop.org, open list , amd-gfx@lists.freedesktop.org, Daniel Vetter References: <20170424062532.26722-1-kraxel@redhat.com> <20170424062532.26722-4-kraxel@redhat.com> From: =?UTF-8?Q?Michel_D=c3=a4nzer?= Message-ID: <3b872a56-80b5-0c44-712f-a9517489eb24@daenzer.net> Date: Tue, 25 Apr 2017 12:18:52 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170424062532.26722-4-kraxel@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 797 Lines: 27 On 24/04/17 03:25 PM, Gerd Hoffmann wrote: > Return correct fourcc codes on bigendian. Drivers must be adapted to > this change. > > Signed-off-by: Gerd Hoffmann Just to reiterate, this won't work for the radeon driver, which programs the GPU to use (effectively, per the current definition that these are little endian GPU formats) DRM_FORMAT_XRGB8888 with pre-R600 and DRM_FORMAT_BGRX8888 with >= R600. > +#ifdef __BIG_ENDIAN > + switch (bpp) { > + case 8: > + fmt = DRM_FORMAT_C8; > + break; > + case 24: > + fmt = DRM_FORMAT_BGR888; > + break; BTW, endianness as a concept cannot apply to 8 or 24 bpp formats. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer