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Subject: Re: [PATCH] x86, msr: Better document AMD "tweak MSRs", rename
 MSR_F15H_IC_CFG
To: Borislav Petkov <bp@alien8.de>
References: <20170425114541.8267-1-dvlasenk@redhat.com>
 <20170425115948.6hekn2xklodjil7e@pd.tnic>
Cc: Ingo Molnar <mingo@redhat.com>, Andy Lutomirski <luto@kernel.org>,
        Brian Gerst <brgerst@gmail.com>, Peter Zijlstra <peterz@infradead.org>,
        "H. Peter Anvin" <hpa@linux.intel.com>, x86@kernel.org,
        linux-kernel@vger.kernel.org
From: Denys Vlasenko <dvlasenk@redhat.com>
Message-ID: <785f402c-a830-1d23-545e-289fb14a84a8@redhat.com>
Date: Tue, 25 Apr 2017 14:16:55 +0200
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On 04/25/2017 01:59 PM, Borislav Petkov wrote:
> On Tue, Apr 25, 2017 at 01:45:41PM +0200, Denys Vlasenko wrote:
>> Before this patch, we have a define for MSR 0xc0011021: MSR_F15H_IC_CFG.
>> But it exists starting from K8, so it's not really a Fam15h MSR only.
>>
>> Lat's call it MSR_AMD64_IC_CFG.
>
> Except that we name only those MSRs with "AMD64" which are
> architectural. See "Appendix A MSR Cross-Reference" in APM vol 2.

Yes, APM vol 2 has none of c001_1xxx MSRs.

However, all IBS registers are in this range. DRi_ADDR_MASK
are in this range - and these are very useful, likely to stay.

In the arch/x86/include/asm/msr-index.h file we already have
three "tweak" MSRs defined with "AMD64":

#define MSR_AMD64_LS_CFG               0xc0011020
#define MSR_AMD64_DC_CFG               0xc0011022
#define MSR_AMD64_BU_CFG2              0xc001102a

I just noticed that we have a fourth one in
arch/x86/kernel/cpu/amd.c:

#define MSR_AMD64_DE_CFG       0xC0011029