Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1955778AbdDZFxn convert rfc822-to-8bit (ORCPT ); Wed, 26 Apr 2017 01:53:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57492 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1955762AbdDZFxN (ORCPT ); Wed, 26 Apr 2017 01:53:13 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 2C4CA81F07 Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=kraxel@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 2C4CA81F07 Message-ID: <1493185990.23739.7.camel@redhat.com> Subject: Re: [PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format From: Gerd Hoffmann To: Michel =?ISO-8859-1?Q?D=E4nzer?= Cc: dri-devel@lists.freedesktop.org, open list , amd-gfx@lists.freedesktop.org, Daniel Vetter Date: Wed, 26 Apr 2017 07:53:10 +0200 In-Reply-To: <3b872a56-80b5-0c44-712f-a9517489eb24@daenzer.net> References: <20170424062532.26722-1-kraxel@redhat.com> <20170424062532.26722-4-kraxel@redhat.com> <3b872a56-80b5-0c44-712f-a9517489eb24@daenzer.net> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Mime-Version: 1.0 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Wed, 26 Apr 2017 05:53:13 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1128 Lines: 34 On Di, 2017-04-25 at 12:18 +0900, Michel Dänzer wrote: > On 24/04/17 03:25 PM, Gerd Hoffmann wrote: > > Return correct fourcc codes on bigendian. Drivers must be adapted to > > this change. > > > > Signed-off-by: Gerd Hoffmann > > Just to reiterate, this won't work for the radeon driver, which programs > the GPU to use (effectively, per the current definition that these are > little endian GPU formats) DRM_FORMAT_XRGB8888 with pre-R600 and > DRM_FORMAT_BGRX8888 with >= R600. Hmm, ok, how does bigendian fbdev emulation work on pre-R600 then? > > +#ifdef __BIG_ENDIAN > > + switch (bpp) { > > + case 8: > > + fmt = DRM_FORMAT_C8; > > + break; > > + case 24: > > + fmt = DRM_FORMAT_BGR888; > > + break; > > BTW, endianness as a concept cannot apply to 8 or 24 bpp formats. I could move the 8 bpp case out of the #ifdef somehow, but code readability will suffer then I think ... For 24 we have different byte orderings, but yes, you can't switch from one to the other with byteswapping. Probably one of the reasons why this format is pretty much out of fashion these days ... cheers, Gerd