Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2997350AbdDZJeu convert rfc822-to-8bit (ORCPT ); Wed, 26 Apr 2017 05:34:50 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:12430 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1435143AbdDZJYL (ORCPT ); Wed, 26 Apr 2017 05:24:11 -0400 From: Pierre Yves MORDRET To: Rob Herring , "M'boumba Cedric Madianga" CC: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , Alexandre TORGUE , "vinod.koul@intel.com" , "linux-kernel@vger.kernel.org" , "mcoquelin.stm32@gmail.com" , "dmaengine@vger.kernel.org" , "dan.j.williams@intel.com" , "linux-arm-kernel@lists.infradead.org" , Pierre Yves MORDRET Subject: Re: [PATCH 3/5] dt-bindings: stm32-dma: Add property to handle STM32 DMAMUX Thread-Topic: [PATCH 3/5] dt-bindings: stm32-dma: Add property to handle STM32 DMAMUX Thread-Index: AQHSvm7HUvoGOx/XX0O9tTbm5m8PTQ== Date: Wed, 26 Apr 2017 09:23:34 +0000 Message-ID: References: <1489414561-28912-1-git-send-email-cedric.madianga@gmail.com> <1489414561-28912-4-git-send-email-cedric.madianga@gmail.com> <20170320213722.oj3ipmslbw2mp27d@rob-hp-laptop> In-Reply-To: <20170320213722.oj3ipmslbw2mp27d@rob-hp-laptop> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.75.127.47] Content-Type: text/plain; charset="Windows-1252" Content-ID: <0204DCE1C9427740AD14FCB522279871@st.com> Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-04-26_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1679 Lines: 43 On 03/20/2017 10:37 PM, Rob Herring wrote: > On Mon, Mar 13, 2017 at 03:15:59PM +0100, M'boumba Cedric Madianga wrote: >> This patch adds an optional property needed for STM32 DMA controller >> addressed via STM32 DMAMUX. >> >> Signed-off-by: M'boumba Cedric Madianga >> --- >> Documentation/devicetree/bindings/dma/stm32-dma.txt | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/dma/stm32-dma.txt b/Documentation/devicetree/bindings/dma/stm32-dma.txt >> index 4408af6..7b5e91a 100644 >> --- a/Documentation/devicetree/bindings/dma/stm32-dma.txt >> +++ b/Documentation/devicetree/bindings/dma/stm32-dma.txt >> @@ -16,6 +16,9 @@ Optional properties: >> - resets: Reference to a reset controller asserting the DMA controller >> - st,mem2mem: boolean; if defined, it indicates that the controller supports >> memory-to-memory transfer >> +- st,dmamux: boolean; if defined, it indicates that the controller is behind a >> + DMA multiplexer. In that case, using dma instances doesn't work for DMA >> + clients. They have to use dma-router instances. > > This should not be needed for the same reason we don't need anything > like this for chained interrupt controllers. > > Also, the compatible string should be specific enough to provide this > information. > > Rob I don't understand what you're meant here. Our DMAs can work with or without DMAMUX driver. Driver uses this binding to use it or not. Py > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > >