Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1437378AbdDZJca (ORCPT ); Wed, 26 Apr 2017 05:32:30 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:43730 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2997084AbdDZJ0d (ORCPT ); Wed, 26 Apr 2017 05:26:33 -0400 From: To: , , , , , , , CC: , , , Sean Wang Subject: [PATCH v2 06/30] arm: dts: mt7623: add clock-frequency to the a7 timer node to mt7623.dtsi Date: Wed, 26 Apr 2017 17:25:50 +0800 Message-ID: <1493198774-4478-7-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1493198774-4478-1-git-send-email-sean.wang@mediatek.com> References: <1493198774-4478-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 888 Lines: 27 From: John Crispin We need to tell the driver what the timers frequency is and that the core has not be configured by the bootrom. Not doing so makes the unit not boot. Signed-off-by: John Crispin Signed-off-by: Sean Wang --- arch/arm/boot/dts/mt7623.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index adb2393..3cc0a3a 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -77,6 +77,8 @@ , , ; + clock-frequency = <13000000>; + arm,cpu-registers-not-fw-configured; }; topckgen: syscon@10000000 { -- 1.9.1