Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754744AbdD0AxW (ORCPT ); Wed, 26 Apr 2017 20:53:22 -0400 Received: from mail.netline.ch ([148.251.143.178]:44629 "EHLO netline-mail3.netline.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752821AbdD0AxN (ORCPT ); Wed, 26 Apr 2017 20:53:13 -0400 Subject: Re: [PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format To: Gerd Hoffmann Cc: Daniel Vetter , dri-devel@lists.freedesktop.org, open list , amd-gfx@lists.freedesktop.org References: <20170424062532.26722-1-kraxel@redhat.com> <20170424062532.26722-4-kraxel@redhat.com> <3b872a56-80b5-0c44-712f-a9517489eb24@daenzer.net> <1493185990.23739.7.camel@redhat.com> <8f91cc58-16dc-5899-66b6-06d430a18801@daenzer.net> <1493208671.23739.19.camel@redhat.com> From: =?UTF-8?Q?Michel_D=c3=a4nzer?= Message-ID: <6bd62182-0de5-a8a7-78c3-029fc73ecc91@daenzer.net> Date: Thu, 27 Apr 2017 09:52:59 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <1493208671.23739.19.camel@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1013 Lines: 34 On 26/04/17 09:11 PM, Gerd Hoffmann wrote: > Hi, > >>>> Just to reiterate, this won't work for the radeon driver, which programs >>>> the GPU to use (effectively, per the current definition that these are >>>> little endian GPU formats) DRM_FORMAT_XRGB8888 with pre-R600 and >>>> DRM_FORMAT_BGRX8888 with >= R600. >>> >>> Hmm, ok, how does bigendian fbdev emulation work on pre-R600 then? >> >> Using a GPU byte swapping mechanism which only affects CPU access to >> video RAM. > > That is done using the RADEON_TILING_SWAP_{16,32}BIT flag mentioned in > another thread? Right. > What about dumb bos? You've mentioned the swap flag isn't used for > those. Which implies they are in little endian byte order (both gpu and > cpu view). Right, AFAICT from looking at the code. > Does the modesetting driver work correctly on that hardware? Not sure. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer