Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S638288AbdD1Qq3 (ORCPT ); Fri, 28 Apr 2017 12:46:29 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:35295 "EHLO relmlie4.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1426358AbdD1QqU (ORCPT ); Fri, 28 Apr 2017 12:46:20 -0400 X-IronPort-AV: E=Sophos;i="5.37,388,1488812400"; d="scan'208";a="241257746" From: Chris Brandt To: Andy Shevchenko CC: Linus Walleij , Jacopo Mondi , Geert Uytterhoeven , Laurent Pinchart , Rob Herring , Mark Rutland , "Russell King - ARM Linux" , Linux-Renesas , "linux-gpio@vger.kernel.org" , devicetree , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Thread-Topic: [PATCH v5 01/10] pinctrl: generic: Add bi-directional and output-enable Thread-Index: AQHSvy8kW/T8jbNXV0G/jE8WsCEqd6HZTneAgAEnEICAACrhkIAAE36AgAAKEjCAACHsAIAAARSggAALXoCAAAXYkA== Date: Fri, 28 Apr 2017 16:46:14 +0000 Message-ID: References: <1493281194-5200-1-git-send-email-jacopo+renesas@jmondi.org> <1493281194-5200-2-git-send-email-jacopo+renesas@jmondi.org> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: gmail.com; dkim=none (message not signed) header.d=none;gmail.com; dmarc=none action=none header.from=renesas.com; x-originating-ip: [75.60.247.61] x-microsoft-exchange-diagnostics: 1;SG2PR06MB1166;7:gCVDEVyLDkg+r6xgmTQ2BuQipijIxva9iOvjAQUPrdOnxDI/vgUhbfQtxaRTVMx6QI1AdybDRvRpGpx+dQVUe0DCBW0+zqyM+ClexXRCP10jjtVbwPk3cr5jwoSZ/BhKXGTn3VC9RnMa2QnWT2KcMXGNmjOsMHyk+jmdER24F7uiLjJ/RD4lQBBCi2VGrS/AYEzM1itZ5zxAgy/DdwsYa8Rj54CoBI+ApunEXPR/ik4/lr0g8ar/D2Z7G4P4Y6rpqOG2C2KRDF1OgvE3QzCkNzpmzLaFgc8lRM5WGwErWmVz4su9XFmAM23i+T2aA6vA5U2LIh9Y8IKlEpYpsLA6MQ==;20:HzAbWZNtG+tKkykzinbijzktzCHeGGOdPQUaeN1Mwpa3fsibs4xAOAUxaQI9BpxaeIuVUGga6aU1ZezcS8+U8opUeAHNwL/AFFGHTlCPfx2473B1roYRXzHKj78aGmF/pmiTZEfFflthdIaamLZe0V6nojiXq6MBzAC7L4aCor4= x-ms-office365-filtering-correlation-id: aee97c1d-d153-4212-bcf5-08d48e5615a7 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001)(2017030254075)(48565401081)(201703131423075)(201703031133081);SRVR:SG2PR06MB1166; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040450)(601004)(2401047)(8121501046)(5005006)(93006095)(93001095)(10201501046)(3002001)(6055026)(6041248)(20161123564025)(20161123555025)(20161123562025)(20161123560025)(201703131423075)(201702281528075)(201703061421075)(6072148);SRVR:SG2PR06MB1166;BCL:0;PCL:0;RULEID:;SRVR:SG2PR06MB1166; x-forefront-prvs: 029174C036 x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(39450400003)(39860400002)(39400400002)(39840400002)(39850400002)(39410400002)(50084003)(24454002)(4326008)(39060400002)(9686003)(189998001)(25786009)(229853002)(66066001)(2900100001)(122556002)(6916009)(53936002)(2950100002)(3660700001)(7736002)(50986999)(93886004)(76176999)(86362001)(110136004)(54356999)(38730400002)(7696004)(7416002)(6116002)(8936002)(3280700002)(74316002)(102836003)(6506006)(55016002)(3846002)(77096006)(99286003)(6436002)(305945005)(33656002)(5660300001)(6246003)(54906002)(2906002)(8676002)(81166006)(41533002);DIR:OUT;SFP:1102;SCL:1;SRVR:SG2PR06MB1166;H:SG2PR06MB1165.apcprd06.prod.outlook.com;FPR:;SPF:None;MLV:ovrnspm;PTR:InfoNoRecords;LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Apr 2017 16:46:14.4635 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-Transport-CrossTenantHeadersStamped: SG2PR06MB1166 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id v3SGl72a006539 Content-Length: 2113 Lines: 51 On Friday, April 28, 2017, Andy Shevchenko wrote: > > We were using "input-enable" to signal when the pin function that we set > also needs to be forcible set to input by the software (once again, > because the HW is not smart enough to do it on its own), but is different > than the bi-directional functionality (ie, a different register setting). > > You are trying to introduce an abstraction, called BiDi, which is > *not* a separate thing from a set of pin properties. Note, I'm talking about 2 different issues we had: 1) Pins that need input and output buffers enabled during normal use. We created "bi-directional" for that. 2) For whatever reason, the HW manual points out that the PFC hardware can't really automatically set buffers enables correctly for some pin instances, and we have to manually assign the pin as input or output using another register. For that, we were using "input-enable" and "output-enable". For #2: > > Note that we added a enable-output for the same reason. > > See RZ/A1H HW Manual section "Table 54.7 Alternative Functions that > PIPCn.PIPCnm Bit Should be Set to 0" > > Perhaps needs to be revisited as well. Sorry, we didn't 'add' anything new. The property "output-enable", (ie, PIN_CONFIG_OUTPUT) already existed and describes what we are doing in the case for output. But, we still have the issue that we have 2 cases that need the input enabled, but they are not the same situation, so we can't just use "input-enable" for both. My only suggestion is (and I'm not sure this is possible in the driver): "input-enable" : case #2 where you need the pin to be forced as an input "output-enable" : case #2 where you need the pin to be forced as an output "input-enable" + "output-enable" : case #1 (replaces "bi-directional"). For example: i2c2_pins: i2c2 { pinmux = , ; input-enable; output-enable; }; So in the SW driver, if we see both, that will signal to us what is going on and what to do about it (as in, set the bi-directional register and not the input direction register). Thoughts? Chris