Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751803AbdFAPoY (ORCPT ); Thu, 1 Jun 2017 11:44:24 -0400 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:33019 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751142AbdFAPoU (ORCPT ); Thu, 1 Jun 2017 11:44:20 -0400 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Jani Nikula" , "Nicholas Mc Guire" Date: Thu, 01 Jun 2017 16:43:15 +0100 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 002/212] drm/i915: relax uncritical udelay_range() In-Reply-To: X-SA-Exim-Connect-IP: 82.70.136.246 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1484 Lines: 39 3.16.44-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Nicholas Mc Guire commit 15a43cbf4736a3932e6259fa7d6e47558f6222b0 upstream. udelay_range(1, 2) is inefficient and as discussions with Jani Nikula unnecessary here. This replaces this tight setting with a relaxed delay of min=20 and max=50 which helps the hrtimer subsystem optimize timer handling. Fixes: commit be4fc046bed3 ("drm/i915: add VLV DSI PLL Calculations") Link: http://lkml.org/lkml/2016/12/15/147 Signed-off-by: Nicholas Mc Guire Reviewed-by: Jani Nikula Signed-off-by: Jani Nikula Link: http://patchwork.freedesktop.org/patch/msgid/1481853578-19834-1-git-send-email-hofrat@osadl.org Signed-off-by: Ben Hutchings --- drivers/gpu/drm/i915/intel_dsi_pll.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) --- a/drivers/gpu/drm/i915/intel_dsi_pll.c +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c @@ -265,8 +265,10 @@ void vlv_enable_dsi_pll(struct intel_enc vlv_configure_dsi_pll(encoder); - /* wait at least 0.5 us after ungating before enabling VCO */ - usleep_range(1, 10); + /* wait at least 0.5 us after ungating before enabling VCO, + * allow hrtimer subsystem optimization by relaxing timing + */ + usleep_range(10, 50); tmp = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); tmp |= DSI_PLL_VCO_EN;