Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752458AbdFAQGV (ORCPT ); Thu, 1 Jun 2017 12:06:21 -0400 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]:33599 "EHLO shadbolt.e.decadent.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752236AbdFAPpJ (ORCPT ); Thu, 1 Jun 2017 11:45:09 -0400 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit MIME-Version: 1.0 From: Ben Hutchings To: linux-kernel@vger.kernel.org, stable@vger.kernel.org CC: akpm@linux-foundation.org, "Geert Uytterhoeven" , "Stephen Boyd" , "Chris Brandt" Date: Thu, 01 Jun 2017 16:43:16 +0100 Message-ID: X-Mailer: LinuxStableQueue (scripts by bwh) Subject: [PATCH 3.16 132/212] clk: renesas: mstp: ensure register writes complete In-Reply-To: X-SA-Exim-Connect-IP: 82.70.136.246 X-SA-Exim-Mail-From: ben@decadent.org.uk X-SA-Exim-Scanned: No (on shadbolt.decadent.org.uk); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1398 Lines: 41 3.16.44-rc1 review patch. If anyone has any objections, please let me know. ------------------ From: Chris Brandt commit f59de563358eb9351b7f8f0ba2d3be2ebb70b93d upstream. When there is no status bit, it is possible for the clock enable/disable operation to have not completed by the time the driver code resumes execution. This is due to the fact that write operations are sometimes queued and delayed internally. Doing a read ensures the write operations has completed. Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi") Signed-off-by: Chris Brandt Reviewed-by: Geert Uytterhoeven Signed-off-by: Stephen Boyd [bwh: Backported to 3.16: - Use barrier() instead of barrier_data() - Adjust filename] Signed-off-by: Ben Hutchings --- drivers/clk/shmobile/clk-mstp.c | 6 ++++++ 1 file changed, 6 insertions(+) --- a/drivers/clk/shmobile/clk-mstp.c +++ b/drivers/clk/shmobile/clk-mstp.c @@ -85,6 +85,12 @@ static int cpg_mstp_clock_endisable(stru value |= bitmask; cpg_mstp_write(group, value, group->smstpcr); + if (!group->mstpsr) { + /* dummy read to ensure write has completed */ + cpg_mstp_read(group, group->smstpcr); + barrier(); + } + spin_unlock_irqrestore(&group->lock, flags); if (!enable || !group->mstpsr)