Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751201AbdFBH2z (ORCPT ); Fri, 2 Jun 2017 03:28:55 -0400 Received: from lucky1.263xmail.com ([211.157.147.131]:51829 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751153AbdFBH2v (ORCPT ); Fri, 2 Jun 2017 03:28:51 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: linux-rockchip@lists.infradead.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <0a321550aeceb89ad1d40e6df2eb7060> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Cc: heiko@sntech.de, shawn.lin@rock-chips.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: Re: [PATCH] PCI: rockchip: Handle return value of clk_prepare_enable To: Arvind Yadav References: <4ebfc69644f9d6e9e5ff0cfc82e9efa5c476be0e.1496312348.git.arvind.yadav.cs@gmail.com> From: Shawn Lin Message-ID: Date: Fri, 2 Jun 2017 15:28:51 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <4ebfc69644f9d6e9e5ff0cfc82e9efa5c476be0e.1496312348.git.arvind.yadav.cs@gmail.com> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2071 Lines: 71 Hi, ?? 2017/6/1 18:21, Arvind Yadav ะด??: > clk_prepare_enable() can fail here and we must check its return value. > > Signed-off-by: Arvind Yadav Acked-by: Shawn Lin > --- > drivers/pci/host/pcie-rockchip.c | 34 ++++++++++++++++++++++++++++------ > 1 file changed, 28 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c > index 0e020b6..0a248cd 100644 > --- a/drivers/pci/host/pcie-rockchip.c > +++ b/drivers/pci/host/pcie-rockchip.c > @@ -1259,24 +1259,46 @@ static int __maybe_unused rockchip_pcie_resume_noirq(struct device *dev) > struct rockchip_pcie *rockchip = dev_get_drvdata(dev); > int err; > > - clk_prepare_enable(rockchip->clk_pcie_pm); > - clk_prepare_enable(rockchip->hclk_pcie); > - clk_prepare_enable(rockchip->aclk_perf_pcie); > - clk_prepare_enable(rockchip->aclk_pcie); > + err = clk_prepare_enable(rockchip->clk_pcie_pm); > + if (err) > + goto err_pcie_pm; > + > + err = clk_prepare_enable(rockchip->hclk_pcie); > + if (err) > + goto err_hclk_pcie; > + > + err = clk_prepare_enable(rockchip->aclk_perf_pcie); > + if (err) > + goto err_aclk_perf_pcie; > + > + err = clk_prepare_enable(rockchip->aclk_pcie); > + if (err) > + goto err_aclk_pcie; > > err = rockchip_pcie_init_port(rockchip); > if (err) > - return err; > + goto err_pcie_resume; > > err = rockchip_cfg_atu(rockchip); > if (err) > - return err; > + goto err_pcie_resume; > > /* Need this to enter L1 again */ > rockchip_pcie_update_txcredit_mui(rockchip); > rockchip_pcie_enable_interrupts(rockchip); > > return 0; > + > +err_pcie_resume: > + clk_disable_unprepare(rockchip->aclk_pcie); > +err_aclk_pcie: > + clk_disable_unprepare(rockchip->aclk_perf_pcie); > +err_aclk_perf_pcie: > + clk_disable_unprepare(rockchip->hclk_pcie); > +err_hclk_pcie: > + clk_disable_unprepare(rockchip->clk_pcie_pm); > +err_pcie_pm: > + return err; > } > > static int rockchip_pcie_probe(struct platform_device *pdev) >