Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751286AbdFECjv (ORCPT ); Sun, 4 Jun 2017 22:39:51 -0400 Received: from mga11.intel.com ([192.55.52.93]:32638 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751204AbdFECjn (ORCPT ); Sun, 4 Jun 2017 22:39:43 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,298,1493708400"; d="scan'208";a="976748520" From: "Chen, Xiaoguang" To: Gerd Hoffmann , Alex Williamson CC: "Tian, Kevin" , "intel-gfx@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "zhenyuw@linux.intel.com" , "chris@chris-wilson.co.uk" , "Lv, Zhiyuan" , "intel-gvt-dev@lists.freedesktop.org" , "Wang, Zhi A" Subject: RE: [PATCH v6 6/6] drm/i915/gvt: Adding interface so user space can get the dma-buf Thread-Topic: [PATCH v6 6/6] drm/i915/gvt: Adding interface so user space can get the dma-buf Thread-Index: AQHS1sTjDVt2qF3L0keVbZ8anq02C6IP0HMAgAEcHXD//4I1gIAA06kg///rUYCAAAcdAIAEXL5Q Date: Mon, 5 Jun 2017 02:39:32 +0000 Message-ID: References: <1495874332-2851-1-git-send-email-xiaoguang.chen@intel.com> <1495874332-2851-7-git-send-email-xiaoguang.chen@intel.com> <20170601120820.3358f7dd@w520.home> <20170601213459.461ecf36@w520.home> <20170602085831.41454a1f@t450s.home> <1496417038.16895.7.camel@redhat.com> In-Reply-To: <1496417038.16895.7.camel@redhat.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id v552e0Yl003724 Content-Length: 2415 Lines: 52 Hi, >-----Original Message----- >From: intel-gvt-dev [mailto:intel-gvt-dev-bounces@lists.freedesktop.org] On >Behalf Of Gerd Hoffmann >Sent: Friday, June 02, 2017 11:24 PM >To: Alex Williamson ; Chen, Xiaoguang > >Cc: Tian, Kevin ; intel-gfx@lists.freedesktop.org; linux- >kernel@vger.kernel.org; zhenyuw@linux.intel.com; chris@chris-wilson.co.uk; Lv, >Zhiyuan ; intel-gvt-dev@lists.freedesktop.org; Wang, Zhi >A >Subject: Re: [PATCH v6 6/6] drm/i915/gvt: Adding interface so user space can get >the dma-buf > > Hi, > >> > When i915's dma-buf's release() callback is called it will try to >> > free the gem object associated with the dma-buf if its ref count is >> > 0. But in our case the ref count is 1 so no free callback is called >> > so we can not release allocations there. > >Why the ref count is one? The gem object is created by us while creating the dma-buf(the ref count of the gem object is initialized to 1). Later when user import the dma-buf the ref count of the gem object associate with the dma-buf will increased. When user finished using the dma-buf it will decrease the ref count. But the ref count of the gem object will become 1 when all the user finished using the dma-buf because we create the gem object(the test also showing this result). Typically user only export a dma-buf(no gem object yet) then when user import the dma-buf then a gem object will be created. But in our case we do not implement the dma-buf from scratch but calling the i915_gem_prime_export() where a gem object is an input parameter. Chenxg >Who holds a reference and why? >Maybe it should be the other way around, i.e. the dmabuf holds a reference on >the vgpu instance backing it, i.e. you can't delete the vgpu while dma-bufs exist? > >> We cannot simply say that the user isn't allowed to release them in >> that order. > >Yep, not going to fly. Can happen even unintentionally because we can pass >around dmabufs to other processes. Example: qemu passes dmabuf to spice- >client, then qemu crashes. mgmt fd is closed before dmabuf fd then. The kernel >must be able to handle that. > >cheers, > Gerd >_______________________________________________ >intel-gvt-dev mailing list >intel-gvt-dev@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev