Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751337AbdFETXp (ORCPT ); Mon, 5 Jun 2017 15:23:45 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:33751 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751216AbdFETXm (ORCPT ); Mon, 5 Jun 2017 15:23:42 -0400 From: Corentin Labbe To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, wens@csie.org, catalin.marinas@arm.com, will.deacon@arm.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Corentin Labbe Subject: [PATCH 2/5] ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i Date: Mon, 5 Jun 2017 21:21:27 +0200 Message-Id: <20170605192130.25320-3-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170605192130.25320-1-clabbe.montjoie@gmail.com> References: <20170605192130.25320-1-clabbe.montjoie@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1766 Lines: 72 The dwmac-sun8i hardware is present on the Banana Pi M2+ It uses an external PHY rtl8211e via RGMII. This patch create the needed regulator, emac and phy nodes. Signed-off-by: Corentin Labbe --- arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 29 +++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts index 883072b611fa..d756ff825116 100644 --- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts @@ -52,6 +52,7 @@ compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; aliases { + ethernet0 = &emac; serial0 = &uart0; serial1 = &uart1; }; @@ -84,6 +85,16 @@ }; }; + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; + }; + wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; @@ -104,12 +115,30 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii"; + + allwinner,leds-active-low; + status = "okay"; +}; + &ir { pinctrl-names = "default"; pinctrl-0 = <&ir_pins_a>; status = "okay"; }; +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -- 2.13.0