Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751279AbdFFBze (ORCPT ); Mon, 5 Jun 2017 21:55:34 -0400 Received: from mail-by2nam01on0064.outbound.protection.outlook.com ([104.47.34.64]:21580 "EHLO NAM01-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751213AbdFFBzb (ORCPT ); Mon, 5 Jun 2017 21:55:31 -0400 Authentication-Results: spf=softfail (sender IP is 192.88.168.50) smtp.mailfrom=gmail.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=fail action=none header.from=gmail.com; Date: Tue, 6 Jun 2017 09:55:28 +0800 From: Peter Chen To: Fabien Lahoudere CC: Stephen Boyd , Peter Chen , Peter Senna Tschudin , Felipe Balbi , Greg Kroah-Hartman , "open list:USB PHY LAYER" , open list Subject: Re: [RFC] usb-phy-generic: Add support to SMSC USB3315 Message-ID: <20170606015528.GB26189@b29397-desktop> References: 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1;MWHPR03MB2574;7:GZhT3pE2tvxR0buzCbeMh+dIImpgCsd230cUX6B3A9pwrEXJXk1kH6KgXc/arhVxV2bgSzYiJwsEUD/wXUOFh2kISBvkTI5hd7dZzw0Q8QHIHLzL//CyUp/qvX/SZzWSyTJY3PCxTvwutm7B8ON9VwiDtkzNMi8fwJpKm3IbqhbyXu5u6V/1tvHf5rMxvMWMn5HuDI+MpKBcRGwkegNpdyHm9bdf1rVqz1zxSDDS5nYZaz0vlXEvyTMWRNGMDI8Ok+alIX1EgLIPWZBHgQPqYYhX8iRD5Xkbqg3dhcm9Tw4EKPmQ2y21xe3tjH8P0QbdIpPZluVTZsNAaoG9keFyWQ== X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jun 2017 01:55:26.0920 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;Ip=[192.88.168.50];Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR03MB2574 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4015 Lines: 87 On Mon, Jun 05, 2017 at 11:52:26AM +0200, Fabien Lahoudere wrote: > On Mon, 2017-06-05 at 17:43 +0800, Peter Chen wrote: > > On Mon, Jun 05, 2017 at 10:57:00AM +0200, Fabien Lahoudere wrote: > > > On Fri, 2017-06-02 at 15:00 -0700, Stephen Boyd wrote: > > > > On 05/26, Fabien Lahoudere wrote: > > > > > Hello > > > > > > > > > > I modify ci_hrdc_imx_probe to bypass?"data->phy = devm_usb_get_phy_by_phandle(&pdev->dev, > > > > > "fsl,usbphy", 0);". Everything works as expected and call ci_ulpi_init. > > > > > > > > > > The problem is that in ci_ulpi_init, before calling "ci->ulpi = ulpi_register_interface(ci- > > > > > >dev, > > > > > &ci->ulpi_ops);" (to initialize our phy), "hw_phymode_configure(ci);" is called which is the > > > > > original function that make our system to hang. > > > > > > > > > > Our phy is not initialised before calling ulpi_register_interface so I don't understand how > > > > > the > > > > > phy > > > > > can reply if it is not out of reset state. > > > > > > > > I haven't see any problem in hw_phymode_configure(). What's the > > > > value of ci->platdata->phy_mode? USBPHY_INTERFACE_MODE_ULPI? If > > > > you phy needs to be taken out of reset to reply to the ulpi reads > > > > of the vendor/product ids, then it sounds like you have a similar > > > > situation to what I had. I needed to turn on some regulators to > > > > get those reads to work, otherwise they would fail, but knowing > > > > what needed to be turned on basically meant I needed to probe the > > > > ulpi driver so probing the ids wasn't going to be useful. So on > > > > my device the reads for the ids go through, but they get all > > > > zeroes back, which is actually ok because there aren't any bits > > > > set on my devices anyway. After the reads see 0, we fallback to > > > > DT matching, which avoids the "bring it out of reset/power it on" > > > > sorts of problems entirely. > > > > > > > > > > Yes the phy mode is configured to USBPHY_INTERFACE_MODE_ULPI. > > > Indeed, this phy need to be out of reset to work. For example everything works fine if I call? > > > "_ci_usb_phy_init(ci);" before calling "hw_phymode_configure(ci);" > > > This function only init reset GPIO and clock. > > > > > > For information, the original patch I have to fix the issue: > > > > > > diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c > > > index 79ad8e9..21aaff1 100644 > > > --- a/drivers/usb/chipidea/core.c > > > +++ b/drivers/usb/chipidea/core.c > > > @@ -391,6 +391,7 @@ static int ci_usb_phy_init(struct ci_hdrc *ci) > > > ? case USBPHY_INTERFACE_MODE_UTMI: > > > ? case USBPHY_INTERFACE_MODE_UTMIW: > > > ? case USBPHY_INTERFACE_MODE_HSIC: > > > + case USBPHY_INTERFACE_MODE_ULPI: > > > ? ret = _ci_usb_phy_init(ci); > > > ? if (!ret) > > > ? hw_wait_phy_stable(); > > > @@ -398,7 +399,6 @@ static int ci_usb_phy_init(struct ci_hdrc *ci) > > > ? return ret; > > > ? hw_phymode_configure(ci); > > > ? break; > > > - case USBPHY_INTERFACE_MODE_ULPI: > > > ? case USBPHY_INTERFACE_MODE_SERIAL: > > > ? hw_phymode_configure(ci); > > > ? ret = _ci_usb_phy_init(ci); > > > --? > > > > Currently, the hw_phymode_configure is called twice for ULPI PHY, the > > two execution are between _ci_usb_phy_init, would you test which one > > causes hang? If the second causes hang, you can make a patch for > > hw_phymode_configure that if the required PORTSC_PTS is the same > > the value in register, do noop. > > The first one hangs,?_ci_usb_phy_init is not called due to hang. > So, you need to comment out hw_phymode_configure at ci_ulpi_init, and you can't get vid/pid correctly, right? If it is, we may need to add power on sequence at chipidea core driver (ci_hdrc_probe) for clock and reset things. http://www.spinics.net/lists/linux-usb/msg157134.html I am wondering if we can call ci_usb_phy_init before calling ci_ulpi_init, since we need to let hardware be ready before reading vid/pid. Stephen & Fabien, does that work for you? -- Best Regards, Peter Chen