Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751495AbdFGITA (ORCPT ); Wed, 7 Jun 2017 04:19:00 -0400 Received: from mo1500.tsb.2iij.net ([210.149.48.172]:55933 "EHLO mo.tsb.2iij.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750739AbdFGIS4 (ORCPT ); Wed, 7 Jun 2017 04:18:56 -0400 X-MXL-Hash: 5937b69a4eb8e02d-49d1531a1b3a8c628ace8dfd566995452bfc2857 Subject: Re: [PATCH -next] mtd: nand: Add support for Toshiba BENAND (Built-in ECC NAND) To: Boris Brezillon Cc: richard@nod.at, dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, cyrille.pitchen@wedev4u.fr, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org References: <1495761335-20535-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> <20170526182254.6a4f98c8@bbrezillon> <20170606231119.5f0fcf85@bbrezillon> From: KOBAYASHI Yoshitake Message-ID: Date: Wed, 7 Jun 2017 17:17:29 +0900 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <20170606231119.5f0fcf85@bbrezillon> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-MAIL-FROM: X-SOURCE-IP: [172.27.153.187] X-Spam: exempt Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1809 Lines: 47 On 2017/06/07 6:11, Boris Brezillon wrote: > On Mon, 5 Jun 2017 14:36:23 +0900 > KOBAYASHI Yoshitake wrote: > >> Hi Boris, >> >> Thank you very much for your detailed review. >> I just comming back from busy week for conference and started to look it. >> >> I have a question regarding to the following comment. >> >>>> static int toshiba_nand_init(struct nand_chip *chip) >>>> { >>>> + struct mtd_info *mtd = nand_to_mtd(chip); >>>> + >>>> if (nand_is_slc(chip)) >>>> chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; >>>> >>>> + if (chip->ecc.mode == NAND_ECC_BENAND) { >>>> + chip->ecc.options = NAND_ECC_CUSTOM_PAGE_ACCESS; >>>> + chip->ecc.bytes = 0; >>> >>> It should be set to 16 according to the datasheet. But I guess this is >>> not exactly true. I'm pretty sure we can use some of these bytes to >>> store real data. Assuming you're using BCH, only 13bytes are needed for >>> 8bits/512bytes strength, and I guess the BBM region is also left >>> untouched (first 2 bytes of the OOB region). >> >> On BENAND, all OOB reginon can be used by user (driver). The calculated >> ECC data stored into other isolated area which is ubable to access from user. >> This is why chip->ecc.bytes = 0. > > Oh, nice! > >> To make sure this specification, I also checked the BENAND datasheet >> but unfortunatelly it was undocumented. Sorry for this confusion. > > No problem. Do you think you can update the datasheet (or ask someone > who can) to clarify this aspect? As you said, it's really not clear > that these ECC bytes are actually stored in a dedicated region that is > invisible to users. Thank you for your comment. I asked to the product department about this. They say they are confirming whether they can update our product datasheet or not. -- Yoshi