Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751825AbdFGU5z (ORCPT ); Wed, 7 Jun 2017 16:57:55 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:58541 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751425AbdFGU5y (ORCPT ); Wed, 7 Jun 2017 16:57:54 -0400 Date: Wed, 7 Jun 2017 22:57:11 +0200 (CEST) From: Stefan Wahren To: Phil Elwell Cc: alexanders83@web.de, Eric Anholt , Rob Herring , Stephen Boyd , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Mark Rutland , linux-rpi-kernel@lists.infradead.org, Florian Fainelli Message-ID: <1668075368.219772.1496869031097@email.1und1.de> In-Reply-To: <79d4534c-49fe-3af4-13d8-2aaf22120d43@raspberrypi.org> References: <79d4534c-49fe-3af4-13d8-2aaf22120d43@raspberrypi.org> Subject: Re: [PATCH 1/2] clk: bcm2835: Add AUX interrupt controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Priority: 3 Importance: Medium X-Mailer: Open-Xchange Mailer v7.8.2-Rev34 X-Originating-Client: open-xchange-appsuite X-Provags-ID: V03:K0:gkq+buMzI090L3kxvDx/jIePx8HNvIGaXAcrTf631xStwwxHIKP 6BwIUfiYHwGUa2znN36W4yqhBO1qXzcjvFh2XZnoDwoBg+sTBWfgT3hBG/LxDRd8O0xjcSC JSXFUivg9vaqHOFkzfjTJ15gDiN2Jr2Gym5k6h/Hh58Qj4/WIpG4NoNtkZJgJw5c7iAnHwo FAl438USfcqyNGjPX2yWg== X-UI-Out-Filterresults: notjunk:1;V01:K0:uSb4jdybVgI=:HJjMmUgAbekxDyNWGQhvBx Qei7AjIDy2aN6Yg/0Dz+oEMI75JyjfGMspzlBa/+g3lNh2oF7HFiFTExdduh2G2MKzYEMmcIV IHbbxeJVHM3jkXxWJTJiFxVh+jHhuof7Z5SM1390KSu55PKEp8gxdQ4+TY1MxyLXxZMtqMzwH vM5Sj3fOCwxMXzE3FhQNwhNUXHBROezlj7/V6pxyJfPgNx3ETzOBmuiIA+/hEQbke69xbg2D0 xK5BlDyPgOeQGx4CvX6wh0YaVcLu1j0rwDDHWzbK3yHxVWn2EhjGuojnULJI5jiIGGKg/AIvM li+4XYXtx3o1lJqeCAWelLx2zwKnCndBuqnegr68A/gwOBo5BommBCWQvTvO49zgvG0wfuHW1 gRu5VmBx1DVpJfu6H1uHgMQT9L1S12HJCYjla+GACCJdbJ2Yq6cQA1IjUUK2+M45VyP/Z4GxC PJJ8GOjv5XmNX+x+CVf5U6zcEtv39OJKxzrdHl3q6BvdGzGMqBFE2mZwydtWUD4BM9rntACwJ DogDc1W8nEF+Bpwwzs65fQNx05qKXzPOJGyvUtEGrBvvZXu3xUYTNdk5hZq2V0xxAp0syjSAu 1/EkKz7wrGev8md2RpoYbITtdtROR+KeF43lQA0p2MXPPN90oa0HYyX8Fj4+EOGQ2Ka6xENha 4GTp+UwWFprwV3Q5UG9qd25heT/+BVW0a5A1yw6+kkDRINEcb3KW15tASdxpIUnC4aLIhbAAG g//ZDOmbygrWx/Fa Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 5046 Lines: 177 > Phil Elwell hat am 7. Juni 2017 um 13:11 geschrieben: > > > Devices in the AUX block share a common interrupt line, with a register > indicating which devices have active IRQs. Expose this as a nested > interrupt controller to avoid IRQ sharing problems (easily observed if > UART1 and SPI1/2 are enabled simultaneously). > > Signed-off-by: Phil Elwell > --- > drivers/clk/bcm/clk-bcm2835-aux.c | 120 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 120 insertions(+) > > diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c b/drivers/clk/bcm/clk-bcm2835-aux.c > index bd750cf..41e0702 100644 > --- a/drivers/clk/bcm/clk-bcm2835-aux.c > +++ b/drivers/clk/bcm/clk-bcm2835-aux.c > @@ -17,17 +17,107 @@ > #include > #include > #include > +#include > +#include > +#include Please try to keep alphabetical order. > #include > > #define BCM2835_AUXIRQ 0x00 > #define BCM2835_AUXENB 0x04 > > +#define BCM2835_AUXIRQ_NUM_IRQS 3 > + > +#define BCM2835_AUXIRQ_UART_IRQ 0 > +#define BCM2835_AUXIRQ_SPI1_IRQ 1 > +#define BCM2835_AUXIRQ_SPI2_IRQ 2 > + > +#define BCM2835_AUXIRQ_UART_MASK 0x01 > +#define BCM2835_AUXIRQ_SPI1_MASK 0x02 > +#define BCM2835_AUXIRQ_SPI2_MASK 0x04 I think these are candidates for the BIT macro. > + > +#define BCM2835_AUXIRQ_ALL_MASK \ > + (BCM2835_AUXIRQ_UART_MASK | \ > + BCM2835_AUXIRQ_SPI1_MASK | \ > + BCM2835_AUXIRQ_SPI2_MASK) > + > +struct auxirq_state { > + void __iomem *status; > + u32 enables; > + struct irq_domain *domain; > + struct regmap *local_regmap; This member isn't used, can it be dropped? > +}; > + > +static struct auxirq_state auxirq __read_mostly; > + > +static irqreturn_t bcm2835_auxirq_handler(int irq, void *dev_id) > +{ > + u32 stat = readl_relaxed(auxirq.status); > + u32 masked = stat & auxirq.enables; > + > + if (masked & BCM2835_AUXIRQ_UART_MASK) > + generic_handle_irq(irq_linear_revmap(auxirq.domain, > + BCM2835_AUXIRQ_UART_IRQ)); > + > + if (masked & BCM2835_AUXIRQ_SPI1_MASK) > + generic_handle_irq(irq_linear_revmap(auxirq.domain, > + BCM2835_AUXIRQ_SPI1_IRQ)); > + > + if (masked & BCM2835_AUXIRQ_SPI2_MASK) > + generic_handle_irq(irq_linear_revmap(auxirq.domain, > + BCM2835_AUXIRQ_SPI2_IRQ)); > + > + return (masked & BCM2835_AUXIRQ_ALL_MASK) ? IRQ_HANDLED : IRQ_NONE; > +} > + > +static int bcm2835_auxirq_xlate(struct irq_domain *d, > + struct device_node *ctrlr, > + const u32 *intspec, unsigned int intsize, > + unsigned long *out_hwirq, > + unsigned int *out_type) > +{ > + if (WARN_ON(intsize != 1)) > + return -EINVAL; > + > + if (WARN_ON(intspec[0] >= BCM2835_AUXIRQ_NUM_IRQS)) > + return -EINVAL; > + > + *out_hwirq = intspec[0]; > + *out_type = IRQ_TYPE_NONE; > + return 0; > +} > + > +static void bcm2835_auxirq_mask(struct irq_data *data) > +{ > + irq_hw_number_t hwirq = irqd_to_hwirq(data); > + > + auxirq.enables &= ~(1 << hwirq); > +} > + > +static void bcm2835_auxirq_unmask(struct irq_data *data) > +{ > + irq_hw_number_t hwirq = irqd_to_hwirq(data); > + > + auxirq.enables |= (1 << hwirq); > +} > + > +static struct irq_chip bcm2835_auxirq_chip = { > + .name = "bcm2835-auxirq", > + .irq_mask = bcm2835_auxirq_mask, > + .irq_unmask = bcm2835_auxirq_unmask, > +}; > + > +static const struct irq_domain_ops bcm2835_auxirq_ops = { > + .xlate = bcm2835_auxirq_xlate//irq_domain_xlate_onecell The C++ comment looks like an artifact > +}; > + > static int bcm2835_aux_clk_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > + struct device_node *node = dev->of_node; > struct clk_hw_onecell_data *onecell; > const char *parent; > struct clk *parent_clk; > + int parent_irq; > struct resource *res; > void __iomem *reg, *gate; > > @@ -41,6 +131,36 @@ static int bcm2835_aux_clk_probe(struct platform_device *pdev) > if (IS_ERR(reg)) > return PTR_ERR(reg); > > + parent_irq = irq_of_parse_and_map(node, 0); > + if (parent_irq) { > + int ret; > + int i; > + > + /* Manage the AUX irq as well */ > + auxirq.status = reg + BCM2835_AUXIRQ; > + auxirq.domain = irq_domain_add_linear(node, > + BCM2835_AUXIRQ_NUM_IRQS, > + &bcm2835_auxirq_ops, > + NULL); > + if (!auxirq.domain) > + return -ENXIO; > + > + for (i = 0; i < BCM2835_AUXIRQ_NUM_IRQS; i++) { > + unsigned int irq = irq_create_mapping(auxirq.domain, i); > + > + if (irq == 0) > + return -ENXIO; > + > + irq_set_chip_and_handler(irq, &bcm2835_auxirq_chip, > + handle_level_irq); > + } > + > + ret = devm_request_irq(dev, parent_irq, bcm2835_auxirq_handler, > + 0, "bcm2835-auxirq", NULL); > + if (ret) > + return ret; > + } > + > onecell = devm_kmalloc(dev, sizeof(*onecell) + sizeof(*onecell->hws) * > BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL); > if (!onecell) > -- > 1.9.1 >