Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751530AbdFGWLG (ORCPT ); Wed, 7 Jun 2017 18:11:06 -0400 Received: from mail-ot0-f194.google.com ([74.125.82.194]:33720 "EHLO mail-ot0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751422AbdFGWLE (ORCPT ); Wed, 7 Jun 2017 18:11:04 -0400 Date: Wed, 7 Jun 2017 17:11:02 -0500 From: Rob Herring To: Mikko Perttunen Cc: mark.rutland@arm.com, thierry.reding@gmail.com, jonathanh@nvidia.com, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Message-ID: <20170607221102.2bctvsdciv7y26lk@rob-hp-laptop> References: <1496304245-24024-1-git-send-email-mperttunen@nvidia.com> <1496304245-24024-2-git-send-email-mperttunen@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1496304245-24024-2-git-send-email-mperttunen@nvidia.com> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 576 Lines: 14 On Thu, Jun 01, 2017 at 11:04:04AM +0300, Mikko Perttunen wrote: > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > registers that initiate CPU frequency/voltage transitions. What the block is should also go in the binding doc. With that, Acked-by: Rob Herring > > Signed-off-by: Mikko Perttunen > --- > .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt