Subject: Re: [PATCH] [3/3] PCI segment support
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Russell King <rmk@arm.linux.org.uk>
Cc: Matthew Wilcox <willy@debian.org>,
       Ivan Kokshaysky <ink@jurassic.park.msu.ru>,
       Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
       David Mosberger <davidm@hpl.hp.com>
In-Reply-To: <20030608223318.C9520@flint.arm.linux.org.uk>
References: <20030407234411.GT23430@parcelfarce.linux.theplanet.co.uk>
	 <20030408203824.A27019@jurassic.park.msu.ru>
	 <20030608164351.GI28581@parcelfarce.linux.theplanet.co.uk>
	 <20030608223318.C9520@flint.arm.linux.org.uk>
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Date: 09 Jun 2003 00:16:17 +0100
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On Sul, 2003-06-08 at 22:33, Russell King wrote:
> On Sun, Jun 08, 2003 at 05:43:51PM +0100, Matthew Wilcox wrote:
> > I envisage ia64 will always turn on CONFIG_PCI_DOMAINS but x86 might
> > well have it as a user question.  I suspect most architectures would
> > never turn it on (yeah, I'm going to design an embedded ARM box with
> > multiple PCI domains.  sure.)
> 
> Don't be so sure.  There's already ARM implementations where there are
> multiple PCI buses hanging off the host bridge - mostly stuff from Intel
> though.

And x86 also, although its normally multiple pci host bridges hanging
off an internal faster bus with a large collection of magic hardware
wizardry to make it look like one

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