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Date: Thu, 8 Jun 2017 17:00:24 +0200
From: Anatolij Gustschin <agust@denx.de>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: linux-fpga@vger.kernel.org, Alan Tull <atull@kernel.org>,
        Moritz Fischer <moritz.fischer@ettus.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        matthew.gerlach@linux.intel.com, yi1.li@linux.intel.com
Subject: Re: [PATCH v5] fpga manager: Add Altera CvP driver
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On Thu, 8 Jun 2017 17:44:19 +0300
Andy Shevchenko andy.shevchenko@gmail.com wrote:

>On Thu, Jun 8, 2017 at 5:15 PM, Anatolij Gustschin <agust@denx.de> wrote:
>> On Thu, 8 Jun 2017 02:38:55 +0300
>> Andy Shevchenko andy.shevchenko@gmail.com wrote:  
>>>On Thu, Jun 8, 2017 at 2:09 AM, Anatolij Gustschin <agust@denx.de> wrote:  
>>>> On Fri, 2 Jun 2017 20:43:21 +0300
>>>> Andy Shevchenko andy.shevchenko@gmail.com wrote:  
>
>>>Besides below comments, please, do
>>>
>>>s/VSEC_/VSE_/g
>>>
>>>for entire file.
>>>
>>>We are following PCI and Thunderbolt pattern for use of Vendor
>>>Specific Extended Capability.  
>>
>> I can do it, but I'm just not getting why. The registers are named as VSEC
>> registers in the documentation, why should the code name them differently?  
>
>Does your documentation decode VSEC abbreviation?
>What C stands for? Capability?

the CvP user guide talks about Vendor Specific Extended Capability (VSEC).

--
Anatolij