Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751501AbdFIEDk (ORCPT ); Fri, 9 Jun 2017 00:03:40 -0400 Received: from regular1.263xmail.com ([211.150.99.130]:37011 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750829AbdFIEDj (ORCPT ); Fri, 9 Jun 2017 00:03:39 -0400 X-263anti-spam: KSV:0;BIG:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ADDR-CHECKED4: 1 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ANTISPAM-LEVEL: 2 X-RL-SENDER: mark.yao@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: mark.yao@rock-chips.com X-UNIQUE-TAG: <66fe89263bebdc520d0b32f39aadadb1> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH 1/4] drm: bridge: dw-hdmi: Export hdmi_phy_configure_dwc_hdmi_3d_tx To: Archit Taneja , David Airlie , Laurent Pinchart , Jose Abreu , Neil Armstrong , Daniel Vetter , Kieran Bingham References: <1496976070-29573-1-git-send-email-mark.yao@rock-chips.com> <1496976343-30005-1-git-send-email-mark.yao@rock-chips.com> Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org From: Mark yao Message-ID: <593A1E13.70501@rock-chips.com> Date: Fri, 9 Jun 2017 12:03:31 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <1496976343-30005-1-git-send-email-mark.yao@rock-chips.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2246 Lines: 61 Ignore this patch, Jose has a better patch to solve rk3399 hdmi phy configure. Hi Jose Sorry for missing your patch about hdmi 2.0 vendor phy fixup: https://patchwork.kernel.org/patch/9702229 It works fine on rk3399/rk3288, can you resend a standard patch to upstream? Thanks On 2017年06月09日 10:45, Mark Yao wrote: > So dw-hdmi vendor driver can reuse hdmi_phy_configure_dwc_hdmi_3d_tx > to configure their hardware. > > Signed-off-by: Mark Yao > --- > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 3 ++- > include/drm/bridge/dw_hdmi.h | 3 +++ > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > index 4e1f54a..c1ceec7 100644 > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c > @@ -1097,7 +1097,7 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi) > * information the DWC MHL PHY has the same register layout and is thus also > * supported by this function. > */ > -static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, > +int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, > const struct dw_hdmi_plat_data *pdata, > unsigned long mpixelclock) > { > @@ -1146,6 +1146,7 @@ static int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, > > return 0; > } > +EXPORT_SYMBOL_GPL(hdmi_phy_configure_dwc_hdmi_3d_tx); > > static int hdmi_phy_configure(struct dw_hdmi *hdmi) > { > diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h > index ed599be..7eb67e6 100644 > --- a/include/drm/bridge/dw_hdmi.h > +++ b/include/drm/bridge/dw_hdmi.h > @@ -150,6 +150,9 @@ int dw_hdmi_probe(struct platform_device *pdev, > int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder, > const struct dw_hdmi_plat_data *plat_data); > > +int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi, > + const struct dw_hdmi_plat_data *pdata, > + unsigned long mpixelclock); > void dw_hdmi_setup_rx_sense(struct device *dev, bool hpd, bool rx_sense); > > void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate); -- Mark Yao