Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751753AbdFIPgC (ORCPT ); Fri, 9 Jun 2017 11:36:02 -0400 Received: from foss.arm.com ([217.140.101.70]:42778 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751534AbdFIPgA (ORCPT ); Fri, 9 Jun 2017 11:36:00 -0400 Subject: Re: [linux-sunxi] Re: [PATCH v2] arm64: allwinner: a64: Add initial NanoPi A64 support To: jagan@openedev.com, maxime.ripard@free-electrons.com, Jagan Teki Cc: Chen-Yu Tsai , Sean Wang , Icenowy Zheng , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Michael Trimarchi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Jagan Teki References: <1497012052-14027-1-git-send-email-jteki@openedev.com> <1497012052-14027-2-git-send-email-jteki@openedev.com> <20170609145141.aknbsis25vmy3rj6@flea.home> <3049841d-36f0-a761-fbed-57971462697c@openedev.com> From: Andre Przywara Message-ID: <3b4dda48-c403-88c4-5c89-63753f508d76@arm.com> Date: Fri, 9 Jun 2017 16:36:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <3049841d-36f0-a761-fbed-57971462697c@openedev.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1397 Lines: 48 Hi, On 09/06/17 16:26, Jagan Teki wrote: > On Friday 09 June 2017 08:21 PM, Maxime Ripard wrote: >> Hi Jagan, >> >> On Fri, Jun 09, 2017 at 12:40:52PM +0000, Jagan Teki wrote: >>> +&i2c1 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&i2c1_pins>; >>> + status = "okay"; >>> +}; >>> + >>> +&i2c1_pins { >>> + bias-pull-up; >>> +}; >> >> What is connected on that bus? > > i2c1 connected with gpio/i2s Those are the I2C pins connected to the headers. We have them in the other A64 DTs as well (Pine64, BananaPi). If that is not the right approach, we should discuss this and keep it consistent at least across the A64 boards. >> >>> +&uart1 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; >>> + status = "okay"; >>> +}; >> >> And on that UART? > > uart1 for SDIO (Wifi connector, with RTS/CTS), this along with mmc1 To be precise, UART1 (with h/w handshake) is connected to the Bluetooth part of the WiFi/BT chip, which is soldered on that board. Regardless of the actual *WiFi* support state BT should work already - at least it did when I tried this a few months ago on the Pine64 (although this involved some userland heavy lifting). Not sure what the approach here is in regard to the power supply and wake-up GPIOs, shall they be described in this node as well or is that up for userspace to control? Cheers, Andre.