Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751728AbdFJBYY (ORCPT ); Fri, 9 Jun 2017 21:24:24 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]:7806 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751595AbdFJBYW (ORCPT ); Fri, 9 Jun 2017 21:24:22 -0400 From: butao To: , , , CC: , , , , , , Subject: [PATCH 2/3] scsi:ufs:add ufs node&reset property for hi3660 Date: Sat, 10 Jun 2017 09:20:58 +0800 Message-ID: <20170610012058.33422-1-butao@hisilicon.com> X-Mailer: git-send-email 2.11.GIT MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [100.107.72.191] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020205.593B4983.001D,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 0aa8c58064f350574332e1acdef7c5aa Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1814 Lines: 43 add ufs node for hi3660 Signed-off-by: Bu Tao --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) mode change 100644 => 100755 arch/arm64/boot/dts/hisilicon/hi3660.dtsi diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi old mode 100644 new mode 100755 index 3983086bd67b..4ba9cec43d94 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -141,6 +141,26 @@ #size-cells = <2>; ranges; + ufs: ufs@ff3b0000 { + compatible = "jedec,ufs-1.1", "hisilicon,hi3660-ufs"; + reg = <0x0 0xff3b0000 0x0 0x1000>, /* 0: HCI standard */ + <0x0 0xff3b1000 0x0 0x1000>; /* 1: UFS SYS CTRL */ + interrupt-parent = <&gic>; + interrupts = <0 278 4>; + clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, + <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; + clock-names = "clk_ref", "clk_phy"; + freq-table-hz = <0 0>, <0 0>; + resets = <&crg_rst 0x84 12>, /* offset: 0x84; bit: 12 */ + <&crg_rst 0x84 7>; /* offset: 0x84; bit: 7 */ + reset-names = "rst", "assert"; + ufs-hi3660-use-rate-B; + ufs-hi3660-broken-fastauto; + ufs-hi3660-use-HS-GEAR3; + ufs-hi3660-broken-clk-gate-bypass; + status = "ok"; + }; + fixed_uart5: fixed_19_2M { compatible = "fixed-clock"; #clock-cells = <0>; -- 2.11.GIT