Date: Sat, 10 Jun 2017 22:28:31 +0200
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Andre Przywara <andre.przywara@arm.com>
Cc: jagan@openedev.com, Jagan Teki <jagannadh.teki@gmail.com>,
        Chen-Yu Tsai <wens@csie.org>, Sean Wang <sean.wang@mediatek.com>,
        Icenowy Zheng <icenowy@aosc.io>, Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will.deacon@arm.com>,
        Michael Trimarchi <michael@amarulasolutions.com>,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
        Jagan Teki <jagan@amarulasolutions.com>
Subject: Re: [linux-sunxi] Re: [PATCH v2] arm64: allwinner: a64: Add initial
 NanoPi A64 support
Message-ID: <20170610202831.usdhtuqc4uqxojmr@flea.home>
References: <1497012052-14027-1-git-send-email-jteki@openedev.com>
 <1497012052-14027-2-git-send-email-jteki@openedev.com>
 <20170609145141.aknbsis25vmy3rj6@flea.home>
 <3049841d-36f0-a761-fbed-57971462697c@openedev.com>
 <3b4dda48-c403-88c4-5c89-63753f508d76@arm.com>
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On Fri, Jun 09, 2017 at 04:36:09PM +0100, Andre Przywara wrote:
> Hi,
>=20
> On 09/06/17 16:26, Jagan Teki wrote:
> > On Friday 09 June 2017 08:21 PM, Maxime Ripard wrote:
> >> Hi Jagan,
> >>
> >> On Fri, Jun 09, 2017 at 12:40:52PM +0000, Jagan Teki wrote:
> >>> +&i2c1 {
> >>> +    pinctrl-names =3D "default";
> >>> +    pinctrl-0 =3D <&i2c1_pins>;
> >>> +    status =3D "okay";
> >>> +};
> >>> +
> >>> +&i2c1_pins {
> >>> +    bias-pull-up;
> >>> +};
> >>
> >> What is connected on that bus?
> >=20
> > i2c1 connected with gpio/i2s
>=20
> Those are the I2C pins connected to the headers. We have them in the
> other A64 DTs as well (Pine64, BananaPi).

We've always had the policy of not enabling anything outside of the
board has been there from the very start, arm64 or not.

> If that is not the right approach, we should discuss this and keep it
> consistent at least across the A64 boards.

If some boards slipped through, then that would be on me I guess,
but it's (unfortunate) exceptions.

If you want to ease that for the users, you can have that node with
the pinctrl nodes pre-set, but leave it disabled. We have that on a
number of boards already.

> >>> +&uart1 {
> >>> +    pinctrl-names =3D "default";
> >>> +    pinctrl-0 =3D <&uart1_pins>, <&uart1_rts_cts_pins>;
> >>> +    status =3D "okay";
> >>> +};
> >>
> >> And on that UART?
> >=20
> > uart1 for SDIO (Wifi connector, with RTS/CTS), this along with mmc1
>=20
> To be precise, UART1 (with h/w handshake) is connected to the Bluetooth
> part of the WiFi/BT chip, which is soldered on that board. Regardless of
> the actual *WiFi* support state BT should work already - at least it did
> when I tried this a few months ago on the Pine64 (although this involved
> some userland heavy lifting).
> Not sure what the approach here is in regard to the power supply and
> wake-up GPIOs, shall they be described in this node as well or is that
> up for userspace to control?

There's probably more to it though. Most BT chips require regulators
and clocks to be enabled. Ideally, this would even be a full DT node
for the bluetooth chip.

Maxime

--=20
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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