Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755061AbdFLQUt (ORCPT ); Mon, 12 Jun 2017 12:20:49 -0400 Received: from mail-dm3nam03on0048.outbound.protection.outlook.com ([104.47.41.48]:51584 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754883AbdFLPhs (ORCPT ); Mon, 12 Jun 2017 11:37:48 -0400 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; From: Dong Aisheng To: CC: , , , , , , , , , , , Dong Aisheng Subject: [PATCH V3 1/7] tty: serial: lpuart: introduce lpuart_soc_data to represent SoC property Date: Mon, 12 Jun 2017 23:37:22 +0800 Message-ID: <1497281848-12995-2-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497281848-12995-1-git-send-email-aisheng.dong@nxp.com> References: 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1;BLUPR03MB166;7:OL2t2i3UXZ8H089eGZOeg8M94EhKdxQOZFq/J/XQHR9qWLC+04gGrXJRMi+bZFlT39KB9hzvPYs2ZLZJMFWwb7dbpoqjSG8RDalshIZfW4CVF3KoYRFrGMezuuIOEQvbr13HSh4UqIcPxcNI5hVw5V1+DRNMXbUxyccwwljUGTc3peH3V5X5Fb7coNU54jnIfvxng9+guaXvZ5aXx5g02FdE1UCequ7lUqANsLufHWyTwJuQ5OMG8oXYojX8XsQnjEGoyIyZf3JHQDFyQqhoJTJhuU4m8qLdRSV2bg8CFwoHrwxbMfQhZMFaaHKVKQ6CcZ6Tf8Iw4YQU8mYJ8Khb7w== X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2017 15:37:25.1343 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;Ip=[192.88.168.50];Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR03MB166 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 5358 Lines: 170 This is used to dynamically check the SoC specific lpuart properies. Currently only the iotype is added, it functions the same as before. With this, new chips with different iotype will be more easily added. Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: Stefan Agner Cc: Mingkai Hu Cc: Yangbo Lu Cc: Fugang Duan Signed-off-by: Dong Aisheng --- ChangeLog: v2->v3: * use standard iotype flags instead of private is_32 member v1->v2: * make all soc_data const --- drivers/tty/serial/fsl_lpuart.c | 48 ++++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 20 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 15df1ba7..4daabc6 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -236,7 +236,6 @@ struct lpuart_port { struct clk *clk; unsigned int txfifo_size; unsigned int rxfifo_size; - bool lpuart32; bool lpuart_dma_tx_use; bool lpuart_dma_rx_use; @@ -258,13 +257,22 @@ struct lpuart_port { wait_queue_head_t dma_wait; }; +struct lpuart_soc_data { + char iotype; +}; + +static const struct lpuart_soc_data vf_data = { + .iotype = UPIO_MEM, +}; + +static const struct lpuart_soc_data ls_data = { + .iotype = UPIO_MEM32BE, + +}; + static const struct of_device_id lpuart_dt_ids[] = { - { - .compatible = "fsl,vf610-lpuart", - }, - { - .compatible = "fsl,ls1021a-lpuart", - }, + { .compatible = "fsl,vf610-lpuart", .data = &vf_data, }, + { .compatible = "fsl,ls1021a-lpuart", .data = &ls_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, lpuart_dt_ids); @@ -593,7 +601,7 @@ static irqreturn_t lpuart_txint(int irq, void *dev_id) spin_lock_irqsave(&sport->port.lock, flags); if (sport->port.x_char) { - if (sport->lpuart32) + if (sport->port.iotype & UPIO_MEM32BE) lpuart32_write(sport->port.x_char, sport->port.membase + UARTDATA); else writeb(sport->port.x_char, sport->port.membase + UARTDR); @@ -601,14 +609,14 @@ static irqreturn_t lpuart_txint(int irq, void *dev_id) } if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { - if (sport->lpuart32) + if (sport->port.iotype & UPIO_MEM32BE) lpuart32_stop_tx(&sport->port); else lpuart_stop_tx(&sport->port); goto out; } - if (sport->lpuart32) + if (sport->port.iotype & UPIO_MEM32BE) lpuart32_transmit_buffer(sport); else lpuart_transmit_buffer(sport); @@ -1881,12 +1889,12 @@ static int __init lpuart_console_setup(struct console *co, char *options) if (options) uart_parse_options(options, &baud, &parity, &bits, &flow); else - if (sport->lpuart32) + if (sport->port.iotype & UPIO_MEM32BE) lpuart32_console_get_options(sport, &baud, &parity, &bits); else lpuart_console_get_options(sport, &baud, &parity, &bits); - if (sport->lpuart32) + if (sport->port.iotype & UPIO_MEM32BE) lpuart32_setup_watermark(sport); else lpuart_setup_watermark(sport); @@ -1971,6 +1979,9 @@ static struct uart_driver lpuart_reg = { static int lpuart_probe(struct platform_device *pdev) { + const struct of_device_id *of_id = of_match_device(lpuart_dt_ids, + &pdev->dev); + const struct lpuart_soc_data *sdata = of_id->data; struct device_node *np = pdev->dev.of_node; struct lpuart_port *sport; struct resource *res; @@ -1988,8 +1999,6 @@ static int lpuart_probe(struct platform_device *pdev) return ret; } sport->port.line = ret; - sport->lpuart32 = of_device_is_compatible(np, "fsl,ls1021a-lpuart"); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); sport->port.membase = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(sport->port.membase)) @@ -1998,15 +2007,14 @@ static int lpuart_probe(struct platform_device *pdev) sport->port.mapbase = res->start; sport->port.dev = &pdev->dev; sport->port.type = PORT_LPUART; - sport->port.iotype = UPIO_MEM; ret = platform_get_irq(pdev, 0); if (ret < 0) { dev_err(&pdev->dev, "cannot obtain irq\n"); return ret; } sport->port.irq = ret; - - if (sport->lpuart32) + sport->port.iotype = sdata->iotype; + if (sport->port.iotype & UPIO_MEM32BE) sport->port.ops = &lpuart32_pops; else sport->port.ops = &lpuart_pops; @@ -2033,7 +2041,7 @@ static int lpuart_probe(struct platform_device *pdev) platform_set_drvdata(pdev, &sport->port); - if (sport->lpuart32) + if (sport->port.iotype & UPIO_MEM32BE) lpuart_reg.cons = LPUART32_CONSOLE; else lpuart_reg.cons = LPUART_CONSOLE; @@ -2086,7 +2094,7 @@ static int lpuart_suspend(struct device *dev) struct lpuart_port *sport = dev_get_drvdata(dev); unsigned long temp; - if (sport->lpuart32) { + if (sport->port.iotype & UPIO_MEM32BE) { /* disable Rx/Tx and interrupts */ temp = lpuart32_read(sport->port.membase + UARTCTRL); temp &= ~(UARTCTRL_TE | UARTCTRL_TIE | UARTCTRL_TCIE); @@ -2137,7 +2145,7 @@ static int lpuart_resume(struct device *dev) if (sport->port.suspended && !sport->port.irq_wake) clk_prepare_enable(sport->clk); - if (sport->lpuart32) { + if (sport->port.iotype & UPIO_MEM32BE) { lpuart32_setup_watermark(sport); temp = lpuart32_read(sport->port.membase + UARTCTRL); temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE | -- 2.7.4