Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752777AbdFLSXN (ORCPT ); Mon, 12 Jun 2017 14:23:13 -0400 Received: from mail-qt0-f194.google.com ([209.85.216.194]:33523 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752251AbdFLSXL (ORCPT ); Mon, 12 Jun 2017 14:23:11 -0400 Subject: Re: [PATCH v2 0/4] Add bcm2835aux interrupt controller To: Phil Elwell , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Mark Rutland , Stefan Wahren , Eric Anholt , Russell King , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-clk@vger.kernel.org References: <4ceb6c92-f752-180e-6a6e-a94dcd120737@raspberrypi.org> From: Florian Fainelli Message-ID: <687bd44a-8b6c-edf9-7dff-c9a5356b20ed@gmail.com> Date: Mon, 12 Jun 2017 11:23:05 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <4ceb6c92-f752-180e-6a6e-a94dcd120737@raspberrypi.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2339 Lines: 53 On 06/12/2017 07:25 AM, Phil Elwell wrote: > Devices in the BCM2835 AUX block share a common interrupt line, with a > register indicating which devices have active IRQs. Expose this as a > nested interrupt controller to avoid IRQ sharing problems (easily > observed if UART1 and SPI1/2 are enabled simultaneously). > > This patch set is complicated by the fact that the DT node for the AUX > clock controller includes the AUXIRQ register needed by this driver. > Patch 1 lays the groundwork by allowing this overlap and preparing for > a future DT change that removes it. Nit: there seems to be something wrong with your git send-email options, the threading should be: [PATCH 0] [PATCH 1] instead, patches 1-4 don't appear as replies to patch 0 anyhow, with the minor nits here and there, this looks good, thanks! > > Changes in v2: > * Add DT bindings and header file for bcm2835-aux-intc. > * Split the interrupt-controller functionality into a dedicated irqchip > driver with a dedicated DT node. > * Remove mask tracking from the intc driver, so that all interrupts > (including spurious ones) are submitted to the IRQ framework. > * Replace hard-coded masks with BIT macro in the intc driver. > * Prepare the AUX clock driver for a time when its DT node may only be > a single word register, but until then ioremap its region without > reserving it to permit sharing. > > Phil Elwell (4): > clk: bcm2835: More flexible IO register remapping > dt: bindings: Add bindings for bcm2835-aux-intc > irqchip: Add BCM2835 AUX interrupt controller > ARM: dts: bcm283x: Add and use bcm2835-aux-intc > > .../interrupt-controller/brcm,bcm2835-aux-intc.txt | 28 ++++ > arch/arm/boot/dts/bcm283x.dtsi | 27 +++- > drivers/clk/bcm/clk-bcm2835-aux.c | 20 ++- > drivers/irqchip/Makefile | 2 +- > drivers/irqchip/irq-bcm2835-aux.c | 155 +++++++++++++++++++++ > .../interrupt-controller/bcm2835-aux-intc.h | 20 +++ > 6 files changed, 243 insertions(+), 9 deletions(-) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-aux-intc.txt > create mode 100644 drivers/irqchip/irq-bcm2835-aux.c > create mode 100644 include/dt-bindings/interrupt-controller/bcm2835-aux-intc.h > -- Florian