Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753478AbdFMOKu (ORCPT ); Tue, 13 Jun 2017 10:10:50 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:34010 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752109AbdFMOKs (ORCPT ); Tue, 13 Jun 2017 10:10:48 -0400 Date: Tue, 13 Jun 2017 16:10:44 +0200 From: Thierry Reding To: Mikko Perttunen Cc: Mikko Perttunen , jonathanh@nvidia.com, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/2] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Message-ID: <20170613141044.GJ16758@ulmo.fritz.box> References: <1496304245-24024-2-git-send-email-mperttunen@nvidia.com> <1497262984-2346-1-git-send-email-mperttunen@nvidia.com> <20170613124239.GC16758@ulmo.fritz.box> <9ecb973e-ee57-8c89-df21-4ed0bff4bb38@kapsi.fi> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="HcccYpVZDxQ8hzPO" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.8.3 (2017-05-23) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2609 Lines: 68 --HcccYpVZDxQ8hzPO Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jun 13, 2017 at 03:47:39PM +0300, Mikko Perttunen wrote: >=20 >=20 > On 13.06.2017 15:46, Mikko Perttunen wrote: > > On 13.06.2017 15:42, Thierry Reding wrote: > > > On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: > > > > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > > > > registers that initiate CPU frequency/voltage transitions. > > > >=20 > > > > Signed-off-by: Mikko Perttunen > > > > Acked-by: Rob Herring > > > > --- > > > > .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 > > > > ++++++++++++++++++++ > > > > 1 file changed, 20 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-= cluster.txt > > > >=20 > > >=20 > > > The ARM SoC maintainers don't like to pick up device tree bindings, so > > > I'd prefer this to go through the cpufreq tree that also contains the > > > driver patches. Presumably this wasn't merged through that tree becau= se > > > of the missing Acked-by by a device tree maintainer? Given that Rob's > > > acked it now, maybe you can resend this to Viresh, who I think had > > > picked up the driver? > >=20 > > Sure, I'll do that. >=20 > > I guess the .dts change should then also go in that > > way? >=20 > Or I guess not, since you applied it :) So the rule of thumb is that .dts changes should go through ARM SoC and device tree binding changes should be going through the same tree as the driver changes that implement the binding. Thierry --HcccYpVZDxQ8hzPO Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlk/8mQACgkQ3SOs138+ s6GzHA/9EyxRCzwqOESOqmN8RCEDYIAe2OBBP6UR9grx9ELwV+1KqLhrUDK22w8h F04NUUVHhEMhLMxIVfv62HUV5X69O57GqgVQAa2V/2PNgmAAvFJRmNyAhrmSrDEJ rxtBpNq1R6geALKO/2dzJSn8Sgw+sbJrU1KPcwLaZdHjLS+FqGyPz5QbyW5RSHRf ntryV3aHQYSrFN3yyzcKZ/HgOac5aHxMzVrOyJwBau8g4a8Fd51qphqHeWPqhmxs wjGanQq31XYLlDoFhq54OGEQ4tOqKcepJmQgFSygxiF7rNZxKcsCDC81HnkCn+qF /AFIE8f7nWo28ENlJKA2WQwLSKpSn539/AN5Bcc2baEBTtmuEu5KpIZXmAWGukax SdG6o6AXIPr7pOZdPu7j+mONpiwovY7I+6svlyWu3sZjaLGF4/hZBZJUgn/J1LyD VN1hHBhmcvLtWBzRrpqMfsOgxJ4qQS00FZZjpVXM4PZk5VPorU+kgk2io6bjKhH4 qq7D1dRm0+lfVBkPlzVUb96HtmGO6HPZcj7gDQyDpEVrTItnmlfiD70Z8SZ6AHxe oCdzOC8HQi+zp4lYqjHe6gJSu++kT9fUeXJmvo7ZVVAI8B60Bra+IslbJucU4AR7 r8QJtGG1zkna4p9WR2azQkjb1vK7pRyeWvArFax55dVK9VRJh0Y= =VK7J -----END PGP SIGNATURE----- --HcccYpVZDxQ8hzPO--