Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752126AbdFNJnT (ORCPT ); Wed, 14 Jun 2017 05:43:19 -0400 Received: from mga05.intel.com ([192.55.52.43]:63890 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751806AbdFNJnB (ORCPT ); Wed, 14 Jun 2017 05:43:01 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,340,1493708400"; d="asc'?scan'208";a="97856053" Date: Wed, 14 Jun 2017 17:38:45 +0800 From: Zhenyu Wang To: Xiaoguang Chen Cc: alex.williamson@redhat.com, kraxel@redhat.com, chris@chris-wilson.co.uk, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, zhenyuw@linux.intel.com, zhiyuan.lv@intel.com, intel-gvt-dev@lists.freedesktop.org, zhi.a.wang@intel.com, kevin.tian@intel.com Subject: Re: [PATCH v8 3/6] drm/i915/gvt: Frame buffer decoder support for GVT-g Message-ID: <20170614093845.3r5kgryn5o6jh2ik@zhen-hp.sh.intel.com> Reply-To: Zhenyu Wang References: <1496991042-2265-1-git-send-email-xiaoguang.chen@intel.com> <1496991042-2265-4-git-send-email-xiaoguang.chen@intel.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="vxvdyawq2r3zkuzw" Content-Disposition: inline In-Reply-To: <1496991042-2265-4-git-send-email-xiaoguang.chen@intel.com> User-Agent: NeoMutt/20170306 (1.8.0) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3163 Lines: 101 --vxvdyawq2r3zkuzw Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2017.06.09 14:50:39 +0800, Xiaoguang Chen wrote: > decode frambuffer attributes of primary, cursor and sprite plane >=20 > Signed-off-by: Xiaoguang Chen =2E.. > +/** > + * intel_vgpu_decode_primary_plane - Decode primary plane > + * @vgpu: input vgpu > + * @plane: primary plane to save decoded info > + * This function is called for decoding plane > + * > + * Returns: > + * 0 on success, non-zero if failed. > + */ > +int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, > + struct intel_vgpu_primary_plane_format *plane) > +{ > + u32 val, fmt; > + struct drm_i915_private *dev_priv =3D vgpu->gvt->dev_priv; > + int pipe; > + > + pipe =3D get_active_pipe(vgpu); > + if (pipe >=3D I915_MAX_PIPES) > + return -ENODEV; > + > + val =3D vgpu_vreg(vgpu, DSPCNTR(pipe)); > + plane->enabled =3D !!(val & DISPLAY_PLANE_ENABLE); > + if (!plane->enabled) > + return -ENODEV; > + > + if (IS_SKYLAKE(dev_priv)) { > + plane->tiled =3D (val & PLANE_CTL_TILED_MASK) >> > + _PLANE_CTL_TILED_SHIFT; > + fmt =3D skl_format_to_drm( > + val & PLANE_CTL_FORMAT_MASK, > + val & PLANE_CTL_ORDER_RGBX, > + val & PLANE_CTL_ALPHA_MASK, > + val & PLANE_CTL_YUV422_ORDER_MASK); > + plane->bpp =3D skl_pixel_formats[fmt].bpp; > + plane->drm_format =3D skl_pixel_formats[fmt].drm_format; > + } else { > + plane->tiled =3D !!(val & DISPPLANE_TILED); > + fmt =3D (val & DISPPLANE_PIXFORMAT_MASK) >> _PRI_PLANE_FMT_SHIFT; > + plane->bpp =3D bdw_pixel_formats[fmt].bpp; > + plane->drm_format =3D bdw_pixel_formats[fmt].drm_format; > + } > + > + if (!skl_pixel_formats[fmt].bpp && !bdw_pixel_formats[fmt].bpp) { > + gvt_vgpu_err("Non-supported pixel format (0x%x)\n", fmt); > + return -EINVAL; > + } Is this correct? shouldn't be plane->bpp as last time comment? > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index 55e3010..400759f 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -161,6 +161,12 @@ extern "C" { > #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsamp= led Cb (1) and Cr (2) planes */ > #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsamp= led Cr (1) and Cb (2) planes */ > =20 > +/* > + * Intel GVT-g plane format definition > + */ > +#define DRM_FORMAT_XRGB161616_GVT fourcc_code('X', 'R', '4', '8') /* [6= 3:0] x:R:G:B 16:16:16:16 little endian */ > +#define DRM_FORMAT_XBGR161616_GVT fourcc_code('X', 'B', '4', '8') /* [6= 3:0] x:B:G:R 16:16:16:16 little endian */ > + > =20 This should be a seperate patch and not need GVT postfix for format definit= ion. --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --vxvdyawq2r3zkuzw Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQTXuabgHDW6LPt9CICxBBozTXgYJwUCWUEEJQAKCRCxBBozTXgY JzZeAJ9uB0m2YSN7Nkvc0YEPtxEuHNi00wCeO2aVsktycCasD3VRQaGRqyCAcqA= =Z2S1 -----END PGP SIGNATURE----- --vxvdyawq2r3zkuzw--