Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752296AbdFNRBb (ORCPT ); Wed, 14 Jun 2017 13:01:31 -0400 Received: from mx2.suse.de ([195.135.220.15]:57565 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751980AbdFNRB3 (ORCPT ); Wed, 14 Jun 2017 13:01:29 -0400 Subject: Re: [HELP-NEEDED, PATCH 0/3] Do not loose dirty bit on THP pages To: Will Deacon , "Aneesh Kumar K.V" Cc: "Kirill A. Shutemov" , Andrew Morton , Vineet Gupta , Russell King , Catalin Marinas , Ralf Baechle , "David S. Miller" , Heiko Carstens , Martin Schwidefsky , Andrea Arcangeli , linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com References: <20170614135143.25068-1-kirill.shutemov@linux.intel.com> <20170614165513.GD17632@arm.com> From: Vlastimil Babka Message-ID: Date: Wed, 14 Jun 2017 19:00:47 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <20170614165513.GD17632@arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1091 Lines: 23 On 06/14/2017 06:55 PM, Will Deacon wrote: >> >> May be we should relook at pmd PTE udpate interface. We really need an >> interface that can update pmd entries such that we don't clear it in >> between. IMHO, we can avoid the pmdp_invalidate() completely, if we can >> switch from a pmd PTE entry to a pointer to PTE page (pgtable_t). We also >> need this interface to avoid the madvise race fixed by > > There's a good chance I'm not following your suggestion here, but it's > probably worth me pointing out that swizzling a page table entry from a > block mapping (e.g. a huge page mapped at the PMD level) to a table entry > (e.g. a pointer to a page of PTEs) can lead to all sorts of horrible > problems on ARM, including amalgamation of TLB entries and fatal aborts. AFAIK some AMD x86_64 CPU's had the same problem and generated MCE's, and on Intel there are some restrictions when you can do that. See the large comment in __split_huge_pmd_locked(). > So we really need to go via an invalid entry, with appropriate TLB > invalidation before installing the new entry. > > Will >