Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752396AbdFOHRL (ORCPT ); Thu, 15 Jun 2017 03:17:11 -0400 Received: from regular1.263xmail.com ([211.150.99.130]:54487 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752075AbdFOHQz (ORCPT ); Thu, 15 Jun 2017 03:16:55 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: frank.wang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: frank.wang@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Frank Wang To: heiko@sntech.de, robh+dt@kernel.org, ulf.hansson@linaro.org, mark.rutland@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, charles.chen@rock-chips.com, kevan.lan@rock-chips.com, huangtao@rock-chips.com, finley.xiao@rock-chips.com, david.wu@rock-chips.com, shawn.lin@rock-chips.com, wmc@rock-chips.com Subject: [PATCH 3/6] ARM: dts: rockchip: fix compatible string for eMMC node of rk3228 SoC Date: Thu, 15 Jun 2017 15:16:17 +0800 Message-Id: <1497510980-23207-4-git-send-email-frank.wang@rock-chips.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1497510980-23207-1-git-send-email-frank.wang@rock-chips.com> References: <1497510980-23207-1-git-send-email-frank.wang@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 712 Lines: 25 From: Shawn Lin This adds amend compatible content for eMMC of RK3228 SoC. Signed-off-by: Shawn Lin --- arch/arm/boot/dts/rk322x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index f3e4ffd..a812422 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -501,7 +501,7 @@ }; emmc: dwmmc@30020000 { - compatible = "rockchip,rk3288-dw-mshc"; + compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x30020000 0x4000>; interrupts = ; clock-frequency = <37500000>; -- 2.0.0