Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752619AbdFON6E (ORCPT ); Thu, 15 Jun 2017 09:58:04 -0400 Received: from mail-wr0-f173.google.com ([209.85.128.173]:34693 "EHLO mail-wr0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751623AbdFON4r (ORCPT ); Thu, 15 Jun 2017 09:56:47 -0400 From: Stephane Eranian To: linux-kernel@vger.kernel.org Cc: acme@redhat.com, peterz@infradead.org, mingo@elte.hu, ak@linux.intel.com, kan.liang@intel.com, jolsa@redhat.com Subject: [PATCH 2/5] perf/x86: add PERF_SAMPLE_SKID_IP support for X86 PEBS Date: Thu, 15 Jun 2017 06:56:26 -0700 Message-Id: <1497534989-29231-3-git-send-email-eranian@google.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497534989-29231-1-git-send-email-eranian@google.com> References: <1497534989-29231-1-git-send-email-eranian@google.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 960 Lines: 29 This patch adds support for SKID_IP to Intel x86 processors in PEBS mode. In that case, the off-by-1 IP from PEBS is returned in the SKID_IP field. Signed-off-by: Stephane Eranian --- arch/x86/events/intel/ds.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index c6d23ffe422d..ee17de5d6b8d 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1169,6 +1169,13 @@ static void setup_pebs_sample_data(struct perf_event *event, x86_pmu.intel_cap.pebs_format >= 1) data->addr = pebs->dla; + /* + * unmodified, skid IP which is guaranteed to be the next + * dyanmic instruction + */ + if (sample_type & PERF_SAMPLE_SKID_IP) + data->skid_ip = pebs->ip; + if (x86_pmu.intel_cap.pebs_format >= 2) { /* Only set the TSX weight when no memory weight. */ if ((sample_type & PERF_SAMPLE_WEIGHT) && !fll) -- 2.13.1.518.g3df882009-goog