Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751980AbdFOPkN convert rfc822-to-8bit (ORCPT ); Thu, 15 Jun 2017 11:40:13 -0400 Received: from mga01.intel.com ([192.55.52.88]:38327 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751711AbdFOPkM (ORCPT ); Thu, 15 Jun 2017 11:40:12 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,343,1493708400"; d="scan'208";a="1141609289" From: "Liang, Kan" To: Stephane Eranian , "linux-kernel@vger.kernel.org" CC: "acme@redhat.com" , "peterz@infradead.org" , "mingo@elte.hu" , "ak@linux.intel.com" , "jolsa@redhat.com" Subject: RE: [PATCH 2/5] perf/x86: add PERF_SAMPLE_SKID_IP support for X86 PEBS Thread-Topic: [PATCH 2/5] perf/x86: add PERF_SAMPLE_SKID_IP support for X86 PEBS Thread-Index: AQHS5d9QkR1P9EpkpkGksCWnOcBxc6ImDj8A Date: Thu, 15 Jun 2017 15:40:07 +0000 Message-ID: <37D7C6CF3E00A74B8858931C1DB2F0775370DC74@SHSMSX103.ccr.corp.intel.com> References: <1497534989-29231-1-git-send-email-eranian@google.com> <1497534989-29231-3-git-send-email-eranian@google.com> In-Reply-To: <1497534989-29231-3-git-send-email-eranian@google.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjM3NDMwMDYtMGVjMi00ZTFkLTk5NWItZDA0ZjI4NjY5NmNlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6ImYrYmFUbmU2c3dVeFg5bStHeHlCaFwvNFJZNmhZSFwvaXJTTnlpdm1wNmNWND0ifQ== x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1196 Lines: 38 > This patch adds support for SKID_IP to Intel x86 processors in PEBS mode. In > that case, the off-by-1 IP from PEBS is returned in the SKID_IP field. It looks we can only get different skid_ip and ip with :pp event (attr.precise = 2). With the :p event (attr.precise = 1), the skid_ip and ip are the same. Right? Thanks, Kan > > Signed-off-by: Stephane Eranian > --- > arch/x86/events/intel/ds.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index > c6d23ffe422d..ee17de5d6b8d 100644 > --- a/arch/x86/events/intel/ds.c > +++ b/arch/x86/events/intel/ds.c > @@ -1169,6 +1169,13 @@ static void setup_pebs_sample_data(struct > perf_event *event, > x86_pmu.intel_cap.pebs_format >= 1) > data->addr = pebs->dla; > > + /* > + * unmodified, skid IP which is guaranteed to be the next > + * dyanmic instruction > + */ > + if (sample_type & PERF_SAMPLE_SKID_IP) > + data->skid_ip = pebs->ip; > + > if (x86_pmu.intel_cap.pebs_format >= 2) { > /* Only set the TSX weight when no memory weight. */ > if ((sample_type & PERF_SAMPLE_WEIGHT) && !fll) > -- > 2.13.1.518.g3df882009-goog