From: "Deucher, Alexander" <Alexander.Deucher@amd.com>
To: "'Samuel Sieb'" <samuel@sieb.net>, Joerg Roedel <jroedel@suse.de>,
        "Bjorn Helgaas" <bhelgaas@google.com>
CC: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Daniel Drake <drake@endlessm.com>,
        David Woodhouse <dwmw2@infradead.org>
Subject: RE: [PATCH v2] PCI: Add ATS-disable quirk for AMD Stoney GPUs
Thread-Topic: [PATCH v2] PCI: Add ATS-disable quirk for AMD Stoney GPUs
Thread-Index: AQHSr6vHBMNtgiI4D0yTU57sgEnxvKImYTqAgAAxmoCAABM/MA==
Date: Thu, 15 Jun 2017 18:13:49 +0000
Message-ID: <BN6PR12MB1652DF4130FC792B71DD9974F7C00@BN6PR12MB1652.namprd12.prod.outlook.com>
References: <1491575538-22694-1-git-send-email-joro@8bytes.org>
 <20170615140421.GB25710@suse.de>
 <6dd9dbac-9b65-bc7c-bb08-413a05d09fc8@sieb.net>
In-Reply-To: <6dd9dbac-9b65-bc7c-bb08-413a05d09fc8@sieb.net>
Accept-Language: en-US
Content-Language: en-US
spamdiagnosticoutput: 1:99
spamdiagnosticmetadata: NSPM
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Jun 2017 18:13:49.8103
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1652
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Transfer-Encoding: 8bit
X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id v5FIEEJv020382
Content-Length: 1566
Lines: 38

> -----Original Message-----
> From: Samuel Sieb [mailto:samuel@sieb.net]
> Sent: Thursday, June 15, 2017 1:02 PM
> To: Joerg Roedel; Bjorn Helgaas
> Cc: linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org; Daniel Drake;
> Deucher, Alexander; David Woodhouse
> Subject: Re: [PATCH v2] PCI: Add ATS-disable quirk for AMD Stoney GPUs
> 
> On 06/15/2017 07:04 AM, Joerg Roedel wrote:
> > Hi Bjorn,
> >
> > On Fri, Apr 07, 2017 at 04:32:18PM +0200, Joerg Roedel wrote:
> >> From: Joerg Roedel <jroedel@suse.de>
> >>
> >> ATS is broken on this hardware and causes IOMMU stalls and
> >> system failure. Disable ATS on these devices to make them
> >> usable again with IOMMU enabled.
> >>
> >> Note that the commit in the Fixes-tag is not buggy, it
> >> just uncovers the problem in the hardware by increasing
> >> the ATS-flush rate.
> >>
> >> Fixes: b1516a14657a ('iommu/amd: Implement flush queue')
> >> Signed-off-by: Joerg Roedel <jroedel@suse.de>
> >> ---
> >>   drivers/pci/quirks.c | 19 +++++++++++++++++++
> >>   1 file changed, 19 insertions(+)
> >
> > Any more objections on this patch? Please let me know if you want to
> > have something changed.
> 
> The other patch seems to fix this issue without disabling ATS.  Isn't
> that better?

I talked to our validation team and ATS was validated on Stoney, so this patch is just working around something else.  The other patch fixes it and is a valid optimization (it should be applied eventually), but apparently the current behavior is allowed even if it's now optimal.  I'm not really an ATS expert.

Alex