Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754234AbdFPOdQ (ORCPT ); Fri, 16 Jun 2017 10:33:16 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:36025 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753878AbdFPOdN (ORCPT ); Fri, 16 Jun 2017 10:33:13 -0400 Subject: Re: [PATCH v3 2/2] arm64: dts: Add Mediatek SoC MT2712 and evaluation board dts and Makefile To: YT Shen , Rob Herring Cc: Mark Rutland , Thomas Gleixner , Jason Cooper , Marc Zyngier , Greg Kroah-Hartman , Catalin Marinas , Will Deacon , Mars Cheng , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com References: <1497620721-61444-1-git-send-email-yt.shen@mediatek.com> <1497620721-61444-3-git-send-email-yt.shen@mediatek.com> From: Matthias Brugger Message-ID: Date: Fri, 16 Jun 2017 16:33:08 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <1497620721-61444-3-git-send-email-yt.shen@mediatek.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3137 Lines: 108 On 16/06/17 15:45, YT Shen wrote: > This adds basic chip support for Mediatek 2712 > > Signed-off-by: YT Shen > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 32 ++++++ > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 166 ++++++++++++++++++++++++++++ > 3 files changed, 199 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712-evb.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712e.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 9fbfd32..fcc0604 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -1,3 +1,4 @@ > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > new file mode 100644 > index 0000000..8c804df > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > @@ -0,0 +1,32 @@ > +/* > + * Copyright (c) 2017 MediaTek Inc. > + * Author: YT Shen > + * > + * SPDX-License-Identifier: (GPL-2.0 OR MIT) > + */ > + > +/dts-v1/; > +#include "mt2712e.dtsi" > + > +/ { > + model = "MediaTek MT2712 evaluation board"; > + compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + memory@40000000 { > + device_type = "memory"; > + reg = <0 0x40000000 0 0x80000000>; > + }; > + > + chosen { > + stdout-path = "serial0:921600n8"; > + }; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > new file mode 100644 > index 0000000..65cdd4a > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > @@ -0,0 +1,166 @@ [...] > + > + uart_clk: dummy26m { > + compatible = "fixed-clock"; > + clock-frequency = <26000000>; > + #clock-cells = <0>; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + interrupts = + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "simple-bus"; > + ranges; > + > + uart5: serial@1000f000 { > + compatible = "mediatek,mt2712-uart", > + "mediatek,mt6577-uart"; > + reg = <0 0x1000f000 0 0x400>; > + interrupts = ; > + clocks = <&uart_clk>; uart has two clocks, baud and bus clock. Please refer to the bindings descrption for more information, that's what they are for. Please define the two dummy clocks with the correct frequency and use them. Regards, Matthias