Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752410AbdFQFRE (ORCPT ); Sat, 17 Jun 2017 01:17:04 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:38518 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750841AbdFQFRD (ORCPT ); Sat, 17 Jun 2017 01:17:03 -0400 Date: Sat, 17 Jun 2017 07:16:58 +0200 From: Greg Kroah-Hartman To: Logan Gunthorpe Cc: linux-ntb@googlegroups.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Jon Mason , Dave Jiang , Allen Hubbe , Bjorn Helgaas , Kurt Schwemmer , Stephen Bates Subject: Re: [RFC PATCH 06/13] switchtec_ntb: initialize hardware for memory windows Message-ID: <20170617051658.GG6040@kroah.com> References: <20170615203729.9009-1-logang@deltatee.com> <20170615203729.9009-7-logang@deltatee.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170615203729.9009-7-logang@deltatee.com> User-Agent: Mutt/1.8.3 (2017-05-23) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1944 Lines: 57 On Thu, Jun 15, 2017 at 02:37:22PM -0600, Logan Gunthorpe wrote: > This commit adds the code to initialize the memory windows in the > hardware. This includes setting up the requester ID table, and > figuring out which bar corresponds to which memory window. (Seeing > the switch can be configured with any number of bars.) > > Also, seeing the device doesn't have hardware for scratchpads or > determining the link status, we create a shared memory window that has > these features. A magic number with a version copmonent will be used > to determine if the otherside's driver is actually up. > > Signed-off-by: Logan Gunthorpe > Reviewed-by: Stephen Bates > Reviewed-by: Kurt Schwemmer > --- > drivers/ntb/hw/mscc/switchtec_ntb.c | 296 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 296 insertions(+) > > diff --git a/drivers/ntb/hw/mscc/switchtec_ntb.c b/drivers/ntb/hw/mscc/switchtec_ntb.c > index 1f094216aa1c..756307d1a8a3 100644 > --- a/drivers/ntb/hw/mscc/switchtec_ntb.c > +++ b/drivers/ntb/hw/mscc/switchtec_ntb.c > @@ -15,37 +15,332 @@ > > #include > #include > +#include > > MODULE_DESCRIPTION("Microsemi Switchtec(tm) NTB Driver"); > MODULE_VERSION("0.1"); > MODULE_LICENSE("GPL"); > MODULE_AUTHOR("Microsemi Corporation"); > > +#ifndef ioread64 > +#ifdef readq > +#define ioread64 readq > +#else > +#define ioread64 _ioread64 > +static inline u64 _ioread64(void __iomem *mmio) > +{ > + u64 low, high; > + > + low = ioread32(mmio); > + high = ioread32(mmio + sizeof(u32)); > + return low | (high << 32); > +} > +#endif > +#endif Really? Don't we have ioread64 in generic code for all arches? If not, that should be fixed, don't hide this in a random driver please. Or just restrict your driver to only building on those arches that does provide this api. thanks, greg k-h