Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753256AbdFSQAS (ORCPT ); Mon, 19 Jun 2017 12:00:18 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:34345 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752673AbdFSQAP (ORCPT ); Mon, 19 Jun 2017 12:00:15 -0400 Date: Mon, 19 Jun 2017 19:00:05 +0300 From: "Kirill A. Shutemov" To: Catalin Marinas Cc: "Kirill A. Shutemov" , Andrew Morton , Vlastimil Babka , Vineet Gupta , Russell King , Will Deacon , Ralf Baechle , "David S. Miller" , "Aneesh Kumar K . V" , Martin Schwidefsky , Heiko Carstens , Andrea Arcangeli , linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, Ingo Molnar , "H . Peter Anvin" , Thomas Gleixner Subject: Re: [PATCHv2 1/3] x86/mm: Provide pmdp_establish() helper Message-ID: <20170619160005.wgj4nymtj2nntfll@node.shutemov.name> References: <20170615145224.66200-1-kirill.shutemov@linux.intel.com> <20170615145224.66200-2-kirill.shutemov@linux.intel.com> <20170619152228.GE3024@e104818-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170619152228.GE3024@e104818-lin.cambridge.arm.com> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2078 Lines: 65 On Mon, Jun 19, 2017 at 04:22:29PM +0100, Catalin Marinas wrote: > Hi Kirill, > > On Thu, Jun 15, 2017 at 05:52:22PM +0300, Kirill A. Shutemov wrote: > > We need an atomic way to setup pmd page table entry, avoiding races with > > CPU setting dirty/accessed bits. This is required to implement > > pmdp_invalidate() that doesn't loose these bits. > > > > On PAE we have to use cmpxchg8b as we cannot assume what is value of new pmd and > > setting it up half-by-half can expose broken corrupted entry to CPU. > > > > Signed-off-by: Kirill A. Shutemov > > Cc: Ingo Molnar > > Cc: H. Peter Anvin > > Cc: Thomas Gleixner > > I'll look at this from the arm64 perspective. It would be good if we can > have a generic atomic implementation based on cmpxchg64 but I need to > look at the details first. Unfortunately, I'm not sure it's possbile. The format of a page table is defined per-arch. We cannot assume much about it in generic code. I guess we could make it compile by casting to 'unsigned long', but is it useful? Every architecture manintainer still has to validate that this assumption is valid for the architecture. > > +static inline pmd_t pmdp_establish(pmd_t *pmdp, pmd_t pmd) > > +{ > > + pmd_t old; > > + > > + /* > > + * We cannot assume what is value of pmd here, so there's no easy way > > + * to set if half by half. We have to fall back to cmpxchg64. > > + */ > > + { > > BTW, you are missing a "do" here (and it probably compiles just fine > without it, though different behaviour). Ouch. Thanks. Hm, what is semantics of the construct without a "do"? > > > + old = *pmdp; > > + } while (cmpxchg64(&pmdp->pmd, old.pmd, pmd.pmd) != old.pmd); > > + > > + return old; > > +} > > -- > Catalin > > -- > To unsubscribe, send a message with 'unsubscribe linux-mm' in > the body to majordomo@kvack.org. For more info on Linux MM, > see: http://www.linux-mm.org/ . > Don't email: email@kvack.org -- Kirill A. Shutemov