Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752516AbdFUH0D (ORCPT ); Wed, 21 Jun 2017 03:26:03 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:40833 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752070AbdFUH0C (ORCPT ); Wed, 21 Jun 2017 03:26:02 -0400 From: "Aneesh Kumar K.V" To: Ram Pai , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, khandual@linux.vnet.ibm.com, bsingharora@gmail.com, dave.hansen@intel.com, hbabu@us.ibm.com, linuxram@us.ibm.com Subject: Re: [RFC v2 07/12] powerpc: Macro the mask used for checking DSI exception In-Reply-To: <1497671564-20030-8-git-send-email-linuxram@us.ibm.com> References: <1497671564-20030-1-git-send-email-linuxram@us.ibm.com> <1497671564-20030-8-git-send-email-linuxram@us.ibm.com> Date: Wed, 21 Jun 2017 12:55:42 +0530 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-MML: disable x-cbid: 17062107-0004-0000-0000-0000021B7315 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17062107-0005-0000-0000-00005DFF1275 Message-Id: <87r2ydajk9.fsf@skywalker.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-06-21_01:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1706210123 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2838 Lines: 61 Ram Pai writes: > Replace the magic number used to check for DSI exception > with a meaningful value. > > Signed-off-by: Ram Pai > --- > arch/powerpc/include/asm/reg.h | 9 ++++++++- > arch/powerpc/kernel/exceptions-64s.S | 2 +- > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h > index 7e50e47..2dcb8a1 100644 > --- a/arch/powerpc/include/asm/reg.h > +++ b/arch/powerpc/include/asm/reg.h > @@ -272,16 +272,23 @@ > #define SPRN_DAR 0x013 /* Data Address Register */ > #define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ > #define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ > +#define DSISR_BIT32 0x80000000 /* not defined */ > #define DSISR_NOHPTE 0x40000000 /* no translation found */ > +#define DSISR_PAGEATTR_CONFLT 0x20000000 /* page attribute conflict */ > +#define DSISR_BIT35 0x10000000 /* not defined */ > #define DSISR_PROTFAULT 0x08000000 /* protection fault */ > #define DSISR_BADACCESS 0x04000000 /* bad access to CI or G */ > #define DSISR_ISSTORE 0x02000000 /* access was a store */ > #define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ > -#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */ > #define DSISR_KEYFAULT 0x00200000 /* Key fault */ > +#define DSISR_BIT43 0x00100000 /* not defined */ > #define DSISR_UNSUPP_MMU 0x00080000 /* Unsupported MMU config */ > #define DSISR_SET_RC 0x00040000 /* Failed setting of R/C bits */ > #define DSISR_PGDIRFAULT 0x00020000 /* Fault on page directory */ > +#define DSISR_PAGE_FAULT_MASK (DSISR_BIT32 | \ > + DSISR_PAGEATTR_CONFLT | \ > + DSISR_BADACCESS | \ > + DSISR_BIT43) > #define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ > #define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ > #define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */ > diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S > index ae418b8..3fd0528 100644 > --- a/arch/powerpc/kernel/exceptions-64s.S > +++ b/arch/powerpc/kernel/exceptions-64s.S > @@ -1411,7 +1411,7 @@ USE_TEXT_SECTION() > .balign IFETCH_ALIGN_BYTES > do_hash_page: > #ifdef CONFIG_PPC_STD_MMU_64 > - andis. r0,r4,0xa410 /* weird error? */ > + andis. r0,r4,DSISR_PAGE_FAULT_MASK@h > bne- handle_page_fault /* if not, try to insert a HPTE */ > andis. r0,r4,DSISR_DABRMATCH@h > bne- handle_dabr_fault Thanks for doing this. I always wondered what that 0xa410 indicates. Now tha it is documented, I am wondering are those the only DSISR values that we want to check early ? You also added few bit positions that is expected to carry value 0 ? But then excluded BIT35. Any reason ? -aneesh