Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752880AbdFVHZL (ORCPT ); Thu, 22 Jun 2017 03:25:11 -0400 Received: from mail.skyhub.de ([5.9.137.197]:42572 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752804AbdFVHZJ (ORCPT ); Thu, 22 Jun 2017 03:25:09 -0400 Date: Thu, 22 Jun 2017 09:24:49 +0200 From: Borislav Petkov To: Andy Lutomirski Cc: X86 ML , "linux-kernel@vger.kernel.org" , Linus Torvalds , Andrew Morton , Mel Gorman , "linux-mm@kvack.org" , Nadav Amit , Rik van Riel , Dave Hansen , Arjan van de Ven , Peter Zijlstra Subject: Re: [PATCH v3 05/11] x86/mm: Track the TLB's tlb_gen and update the flushing algorithm Message-ID: <20170622072449.4rc4bnvucn7usuak@pd.tnic> References: <91f24a6145b2077f992902891f8fa59abe5c8696.1498022414.git.luto@kernel.org> <20170621184424.eixb2jdyy66xq4hg@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1118 Lines: 33 On Wed, Jun 21, 2017 at 07:46:05PM -0700, Andy Lutomirski wrote: > > I'm certainly still missing something here: > > > > We have f->new_tlb_gen and mm_tlb_gen to control the flushing, i.e., we > > do once > > > > bump_mm_tlb_gen(mm); > > > > and once > > > > info.new_tlb_gen = bump_mm_tlb_gen(mm); > > > > and in both cases, the bumping is done on mm->context.tlb_gen. > > > > So why isn't that enough to do the flushing and we have to consult > > info.new_tlb_gen too? > > The issue is a possible race. Suppose we start at tlb_gen == 1 and > then two concurrent flushes happen. The first flush is a full flush > and sets tlb_gen to 2. The second is a partial flush and sets tlb_gen > to 3. If the second flush gets propagated to a given CPU first and it Maybe I'm still missing something, which is likely... but if the second flush gets propagated to the CPU first, the CPU will have local tlb_gen 1 and thus enforce a full flush anyway because we will go 1 -> 3 on that particular CPU. Or? -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.