Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752835AbdFVLvd (ORCPT ); Thu, 22 Jun 2017 07:51:33 -0400 Received: from mail-ot0-f193.google.com ([74.125.82.193]:34747 "EHLO mail-ot0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751199AbdFVLva (ORCPT ); Thu, 22 Jun 2017 07:51:30 -0400 MIME-Version: 1.0 In-Reply-To: <0f79aeea-53e3-6bea-ffa6-0e057f2ff83b@huawei.com> References: <20170616065119.10704-1-butao@hisilicon.com> <20170616065119.10704-3-butao@hisilicon.com> <0f79aeea-53e3-6bea-ffa6-0e057f2ff83b@huawei.com> From: Arnd Bergmann Date: Thu, 22 Jun 2017 13:51:28 +0200 X-Google-Sender-Auth: TEY-vIJnoPYssyOjJI96FlZQick Message-ID: Subject: Re: [PATCH v2 2/5] dt-bindings: scsi: ufs: add document for hi3660-ufs To: Bu Tao Cc: Rob Herring , Mark Rutland , Wei Xu , Catalin Marinas , Will Deacon , Vinayak Holikatti , "James E.J. Bottomley" , "Martin K. Petersen" , Kevin Hilman , Gregory CLEMENT , Thomas Petazzoni , Masahiro Yamada , Riku Voipio , Thierry Reding , Krzysztof Kozlowski , Eric Anholt , devicetree@vger.kernel.org, Linux Kernel Mailing List , Linux ARM , linux-scsi@vger.kernel.org, Guodong Xu , suzhuangluan@hisilicon.com, kongfei@hisilicon.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id v5MBphcQ020188 Content-Length: 2148 Lines: 47 On Thu, Jun 22, 2017 at 1:44 PM, Bu Tao wrote: > 在 2017/6/17 5:51, Arnd Bergmann 写道: >> On Fri, Jun 16, 2017 at 8:51 AM, Bu Tao wrote: >>> +Optional properties for board device: >>> +- ufs-hi3660-use-rate-B : specifies UFS rate-B >>> +- ufs-hi3660-broken-fastauto : specifies no fastauto >>> +- ufs-hi3660-use-HS-GEAR3 : specifies UFS HS-GEAR3 >>> +- ufs-hi3660-use-HS-GEAR2 : specifies UFS HS-GEAR2 >>> +- ufs-hi3660-use-HS-GEAR1 : specifies UFS HS-GEAR1 >>> +- ufs-hi3660-broken-clk-gate-bypass : specifies no clk-gate >>> +- ufs-hi3660-use-one-line : specifies UFS use one line work >>> +- reset-gpio : specifies to reset devices >> >> >> Some of these sound rather generic and might apply to UFS implementations >> other than hi3660, so I'd suggest adding them to the base ufs binding with >> a generic name instead. >> >> Any DT properties that might be useful across multiple implementations >> should be parsed in generic code that gets called by the individual >> drivers, >> and then the properties that are specific to the integration work done by >> hisilicon should be prefixed with "hisilicon,", but not normally with the >> SoC name: it is quite possible that another SoC will be derived from this >> chip and it should reuse the properties. > > > I do not know wheher other SoC need to use the optional properties as > abover. So here the name of the optional properties has "hi3660". They should not have "hi3660" in their names either way, independent of where they are used. >> (note: this is different from the value of the "compatible" property that >> is meant to be as specific as possible". >> >> Also, please clarify how your binding relates to the ufshcd binding >> in Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt: does >> hi3660 implement any registers that are shared with ufshcd, or does >> it use the same physical interface with a different register set? > > No, only show how to use the dt-binding for hi3660 SoC My question was about the hardware: does hi3660 implement ufshcd or not? Arnd