Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752040AbdFZTlJ (ORCPT ); Mon, 26 Jun 2017 15:41:09 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:36267 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751491AbdFZTlA (ORCPT ); Mon, 26 Jun 2017 15:41:00 -0400 Date: Mon, 26 Jun 2017 14:40:58 -0500 From: Rob Herring To: Georgi Djakov Cc: sboyd@codeaurora.org, jassisinghbrar@gmail.com, bjorn.andersson@linaro.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v8 3/3] mailbox: qcom: Add support for APCS clock controller Message-ID: <20170626194058.43fttjvs23vxtuuu@rob-hp-laptop> References: <20170623161533.20449-1-georgi.djakov@linaro.org> <20170623161533.20449-4-georgi.djakov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170623161533.20449-4-georgi.djakov@linaro.org> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 765 Lines: 18 On Fri, Jun 23, 2017 at 07:15:33PM +0300, Georgi Djakov wrote: > Add a driver for the APCS clock controller. It is part of the APCS > hardware block, which among other things implements also a combined > mux and half integer divider functionality. It can choose between a > fixed-rate clock or the dedicated APCS (A53) PLL. The source and the > divider can be set both at the same time. > > This is required for enabling CPU frequency scaling on MSM8916-based > platforms. > > Signed-off-by: Georgi Djakov > --- > .../bindings/mailbox/qcom,apcs-kpss-global.txt | 5 + Acked-by: Rob Herring > drivers/mailbox/qcom-apcs-ipc-mailbox.c | 122 +++++++++++++++++++++ > 2 files changed, 127 insertions(+)