Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751982AbdF0Cu3 (ORCPT ); Mon, 26 Jun 2017 22:50:29 -0400 Received: from mailgw02.mediatek.com ([218.249.47.111]:47909 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751806AbdF0Cu2 (ORCPT ); Mon, 26 Jun 2017 22:50:28 -0400 Message-ID: <1498531815.22478.3.camel@mhfsdcap03> Subject: Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX From: Zhi Mao To: m18063 CC: , Thierry Reding , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , , , , , Date: Tue, 27 Jun 2017 10:50:15 +0800 In-Reply-To: <8eaabcb6-c7b1-efcc-7dae-967a38feb8f1@microchip.com> References: <1498194505-30930-1-git-send-email-zhi.mao@mediatek.com> <1498194505-30930-6-git-send-email-zhi.mao@mediatek.com> <8eaabcb6-c7b1-efcc-7dae-967a38feb8f1@microchip.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1319 Lines: 47 On Mon, 2017-06-26 at 11:43 +0300, m18063 wrote: > > On 23.06.2017 08:08, Zhi Mao wrote: > > Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config() > > to improve the code readablity. > > > > Signed-off-by: Zhi Mao > > --- > > drivers/pwm/pwm-mediatek.c | 6 +++++- > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c > > index 554a042..e5f6425 100644 > > --- a/drivers/pwm/pwm-mediatek.c > > +++ b/drivers/pwm/pwm-mediatek.c > > @@ -30,6 +30,8 @@ > > #define PWMDWIDTH 0x2c > > #define PWMTHRES 0x30 > > > > +#define PWM_CLK_DIV_MAX 7 > > + > > enum { > > MTK_CLK_MAIN = 0, > > MTK_CLK_TOP, > > @@ -130,8 +132,10 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, > > clkdiv++; > > } > > > > - if (clkdiv > 7) > > + if (clkdiv > PWM_CLK_DIV_MAX) { > You forgot to: > mtk_pwm_clk_disable(chip, pwm); Hi Claudiu, Thanks for your suggestion. It's a problem, I will modify this in the next release. Regards, Zhi > > + dev_err(chip->dev, "period %d not supported\n", period_ns); > > return -EINVAL; > > + } > > > > mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); > > mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution); > >