Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752498AbdF0I7B (ORCPT ); Tue, 27 Jun 2017 04:59:01 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:18306 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751632AbdF0I6H (ORCPT ); Tue, 27 Jun 2017 04:58:07 -0400 Subject: Re: [PATCH v2 1/8] dt-bindings: mfd: Add STM32 LPTimer binding To: Rob Herring CC: , , , , , , , , , , , , References: <1498055415-31513-1-git-send-email-fabrice.gasnier@st.com> <1498055415-31513-2-git-send-email-fabrice.gasnier@st.com> <20170626180744.fyyzjsu4pmurohap@rob-hp-laptop> From: Fabrice Gasnier Message-ID: Date: Tue, 27 Jun 2017 10:57:32 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <20170626180744.fyyzjsu4pmurohap@rob-hp-laptop> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG8NODE1.st.com (10.75.127.22) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-06-27_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2660 Lines: 92 On 06/26/2017 08:07 PM, Rob Herring wrote: > On Wed, Jun 21, 2017 at 04:30:08PM +0200, Fabrice Gasnier wrote: >> Add documentation for STMicroelectronics STM32 Low-Power Timer binding. >> >> Signed-off-by: Fabrice Gasnier >> --- >> Changes in v2: >> - Lee's comments: s/Low Power/Low-Power/, remove 0x in example, improve >> properties descriptions >> --- >> .../devicetree/bindings/mfd/stm32-lptimer.txt | 48 ++++++++++++++++++++++ >> 1 file changed, 48 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mfd/stm32-lptimer.txt >> >> diff --git a/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt b/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt >> new file mode 100644 >> index 0000000..af859c8 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt >> @@ -0,0 +1,48 @@ >> +STMicroelectronics STM32 Low-Power Timer >> + >> +The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several >> +functions: >> +- PWM output (with programmable prescaler, configurable polarity) >> +- Quadrature encoder, counter >> +- Trigger source for STM32 ADC/DAC (LPTIM_OUT) >> + >> +Required properties: >> +- compatible: Must be "st,stm32-lptimer". >> +- reg: Offset and length of the device's register set. >> +- clocks: Phandle to the clock used by the LP Timer module. >> +- clock-names: Must be "mux". >> +- #address-cells: Should be '<1>'. >> +- #size-cells: Should be '<0>'. >> + >> +Optional subnodes: >> +- pwm: See ../pwm/pwm-stm32-lp.txt >> +- counter: See ../iio/timer/stm32-lptimer-cnt.txt >> +- trigger: See ../iio/timer/stm32-lptimer-trigger.txt >> + >> +Example: >> + >> + lptimer1: lptimer@40002400 { > > timer@... Hi Rob, I initially put "lptimer" here to distinguish Low-Power Timer hardware from other "timers" hardware that can be found also on stm32 devices. I'd prefer to keep it, is it sensible from your point of view ? Please advise. > >> + compatible = "st,stm32-lptimer"; >> + reg = <0x40002400 0x400>; >> + clocks = <&timer_clk>; >> + clock-names = "mux"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + pwm { >> + compatible = "st,stm32-pwm-lp"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&lppwm1_pins>; >> + }; >> + >> + trigger@0 { >> + compatible = "st,stm32-lptimer-trigger"; >> + reg = <0>; > > Is there more than 1? reg identifies trigger hardware block. Best Regards, Thanks, Fabrice > >> + }; >> + >> + counter { >> + compatible = "st,stm32-lptimer-counter"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&lptim1_in_pins>; >> + }; >> + }; >> -- >> 1.9.1 >>