Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752651AbdF0JqA (ORCPT ); Tue, 27 Jun 2017 05:46:00 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:51030 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752520AbdF0Jpr (ORCPT ); Tue, 27 Jun 2017 05:45:47 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3F3146087C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=varada@codeaurora.org From: Varadarajan Narayanan To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: Varadarajan Narayanan , Sham Muthayyan Subject: [PATCH v4 01/14] spi: qup: Enable chip select support Date: Tue, 27 Jun 2017 15:15:18 +0530 Message-Id: <1498556731-13087-2-git-send-email-varada@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1498556731-13087-1-git-send-email-varada@codeaurora.org> References: <1498556731-13087-1-git-send-email-varada@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1793 Lines: 54 Enable chip select support for QUP versions later than v1. The chip select support was broken in QUP version 1. Hence the chip select support was removed earlier in commit 4a8573abe965115bc5b064401fd669b74e985258. Since the chip select support is functional in recent versions of QUP, re-enabling it for QUP versions later than v1. Signed-off-by: Sham Muthayyan Signed-off-by: Varadarajan Narayanan --- drivers/spi/spi-qup.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index 1bfa889..c0d4def 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -750,6 +750,24 @@ static int spi_qup_init_dma(struct spi_master *master, resource_size_t base) return ret; } +static void spi_qup_set_cs(struct spi_device *spi, bool val) +{ + struct spi_qup *controller; + u32 spi_ioc; + u32 spi_ioc_orig; + + controller = spi_master_get_devdata(spi->master); + spi_ioc = readl_relaxed(controller->base + SPI_IO_CONTROL); + spi_ioc_orig = spi_ioc; + if (!val) + spi_ioc |= SPI_IO_C_FORCE_CS; + else + spi_ioc &= ~SPI_IO_C_FORCE_CS; + + if (spi_ioc != spi_ioc_orig) + writel_relaxed(spi_ioc, controller->base + SPI_IO_CONTROL); +} + static int spi_qup_probe(struct platform_device *pdev) { struct spi_master *master; @@ -846,6 +864,9 @@ static int spi_qup_probe(struct platform_device *pdev) if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1")) controller->qup_v1 = 1; + if (!controller->qup_v1) + master->set_cs = spi_qup_set_cs; + spin_lock_init(&controller->lock); init_completion(&controller->done); -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation