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Date: Tue, 27 Jun 2017 22:54:14 +1000 (AEST)
From: Finn Thain <fthain@telegraphics.com.au>
To: Michael Schmitz <schmitzmic@gmail.com>
cc: Ondrej Zary <linux@rainbow-software.org>,
        "James E.J. Bottomley" <jejb@linux.vnet.ibm.com>,
        "Martin K. Petersen" <martin.petersen@oracle.com>,
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Subject: Re: [PATCH v3 0/4] g_NCR5380: PDMA fixes and cleanup
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On Tue, 27 Jun 2017, Michael Schmitz wrote:

> Ondrej,
> 
> could this be a partial write (target did not transfer the last byte)?
> 

We do wait for TCR_LAST_BYTE_SENT, but only when there is no residual.

Perhaps we should wait for TCR_LAST_BYTE_SENT whenever the 53c400 asserts 
/EOP. That is, whenever BASR_END_DMA_TRANSFER is set.

-- 

> One would suppose the chip posts a phase mismatch in that case ...
> 
> Cheers,
> 
> 	Michael
>