From: "Liang, Kan" <kan.liang@intel.com>
To: Jiri Olsa <jolsa@redhat.com>
CC: "acme@kernel.org" <acme@kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "peterz@infradead.org" <peterz@infradead.org>,
        "Hunter, Adrian" <adrian.hunter@intel.com>,
        "alexander.shishkin@linux.intel.com" 
        <alexander.shishkin@linux.intel.com>,
        "ak@linux.intel.com" <ak@linux.intel.com>
Subject: RE: [PATCH] perf tools: set no branch type for dummy event in PT
Thread-Topic: [PATCH] perf tools: set no branch type for dummy event in PT
Thread-Index: AQHS8Bt1uVwRKpcWuUaNyttmillp0qI7cpcAgACGV+A=
Date: Thu, 29 Jun 2017 15:31:45 +0000
Message-ID: <37D7C6CF3E00A74B8858931C1DB2F0775371415B@SHSMSX103.ccr.corp.intel.com>
References: <20170628143153.29643-1-kan.liang@intel.com>
 <20170629152912.GB1463@krava>
In-Reply-To: <20170629152912.GB1463@krava>
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> On Wed, Jun 28, 2017 at 10:31:53AM -0400, kan.liang@intel.com wrote:
> > From: Kan Liang <kan.liang@intel.com>
> >
> > An earlier kernel patch allowed enabling PT and LBR at the same time
> > on Goldmont.
> > commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity
> > if the core supports it") However, users still cannot use Intel PT and
> > LBRs simultaneously.
> >     $ sudo perf record -e cycles,intel_pt//u -b  -- sleep 1
> >     Error:
> >     PMU Hardware doesn't support sampling/overflow-interrupts.
> >
> > PT implicitly adds dummy event in perf tool. dummy event is software
> > event which doesn't support LBR.
> >
> > Always setting branch_type=no for dummy event in Intel PT.
> >
> > Signed-off-by: Kan Liang <kan.liang@intel.com>
> > ---
> >  tools/perf/arch/x86/util/intel-pt.c | 19 +++++++++++++++++++
> >  1 file changed, 19 insertions(+)
> >
> > diff --git a/tools/perf/arch/x86/util/intel-pt.c
> > b/tools/perf/arch/x86/util/intel-pt.c
> > index f630de0..651ab9e 100644
> > --- a/tools/perf/arch/x86/util/intel-pt.c
> > +++ b/tools/perf/arch/x86/util/intel-pt.c
> > @@ -544,6 +544,22 @@ static int intel_pt_validate_config(struct perf_pmu
> *intel_pt_pmu,
> >  					evsel->attr.config);
> >  }
> >
> > +static int add_no_lbr_config_term(struct list_head *config_terms) {
> > +	struct perf_evsel_config_term *lbr_term;
> > +
> > +	lbr_term = zalloc(sizeof(*lbr_term));
> > +	if (!lbr_term)
> > +		return -ENOMEM;
> > +
> > +	INIT_LIST_HEAD(&lbr_term->list);
> > +	lbr_term->type = PERF_EVSEL__CONFIG_TERM_BRANCH;
> > +	lbr_term->val.branch = strdup("no");
> > +	list_add_tail(&lbr_term->list, config_terms);
> > +
> > +	return 0;
> > +}
> > +
> >  static int intel_pt_recording_options(struct auxtrace_record *itr,
> >  				      struct perf_evlist *evlist,
> >  				      struct record_opts *opts)
> > @@ -701,6 +717,8 @@ static int intel_pt_recording_options(struct
> auxtrace_record *itr,
> >  				perf_evsel__set_sample_bit(switch_evsel,
> TIME);
> >  				perf_evsel__set_sample_bit(switch_evsel,
> CPU);
> >
> > +				add_no_lbr_config_term(&switch_evsel-
> >config_terms);
> > +
> 
> hum, why can't you change the sample bit directly? with:
> 
> 			perf_evsel__reset_sample_bit(switch_evsel,
> BRANCH_STACK);

It will be overwrite in perf_evsel__config.

Thanks,
Kan