Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752120AbdF3RR5 (ORCPT ); Fri, 30 Jun 2017 13:17:57 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:40758 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751322AbdF3RRx (ORCPT ); Fri, 30 Jun 2017 13:17:53 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 9B5156099A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Fri, 30 Jun 2017 10:17:50 -0700 From: Stephen Boyd To: Varadarajan Narayanan Cc: andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] dts: ipq4019: Move xo and timer nodes to SoC dtsi Message-ID: <20170630171750.GM22780@codeaurora.org> References: <1498817281-30608-1-git-send-email-varada@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1498817281-30608-1-git-send-email-varada@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2046 Lines: 78 On 06/30, Varadarajan Narayanan wrote: > diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi > index b9457dd..b74c113 100644 > --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi > +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi > @@ -20,26 +20,7 @@ > model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1"; > compatible = "qcom,ipq4019"; > > - clocks { > - xo: xo { > - compatible = "fixed-clock"; > - clock-frequency = <48000000>; > - #clock-cells = <0>; > - }; > - }; > - > soc { > - > - > - timer { > - compatible = "arm,armv7-timer"; > - interrupts = <1 2 0xf08>, > - <1 3 0xf08>, > - <1 4 0xf08>, > - <1 1 0xf08>; > - clock-frequency = <48000000>; > - }; > - > pinctrl@0x01000000 { This should be pinctrl@1000000 { and fixed in another patch. > serial_pins: serial_pinmux { > mux { > diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi > index b7a24af..e8ab1e1 100644 > --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi > +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi > @@ -96,6 +96,11 @@ > clock-frequency = <32768>; > #clock-cells = <0>; > }; > + xo: xo { Please add a newline so it isn't right next to the previous node. > + compatible = "fixed-clock"; > + clock-frequency = <48000000>; > + #clock-cells = <0>; > + }; > }; > > soc { > @@ -104,6 +109,15 @@ > ranges; > compatible = "simple-bus"; > > + timer { > + compatible = "arm,armv7-timer"; > + interrupts = <1 2 0xf08>, > + <1 3 0xf08>, > + <1 4 0xf08>, > + <1 1 0xf08>; > + clock-frequency = <48000000>; > + }; This should be outside of the soc node. > + > intc: interrupt-controller@b000000 { > compatible = "qcom,msm-qgic2"; > interrupt-controller; -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project