Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752239AbdGBLME (ORCPT ); Sun, 2 Jul 2017 07:12:04 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:39505 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750818AbdGBLMD (ORCPT ); Sun, 2 Jul 2017 07:12:03 -0400 Date: Sun, 2 Jul 2017 13:11:57 +0200 (CEST) From: Thomas Gleixner To: Vikas Shivappa cc: x86@kernel.org, linux-kernel@vger.kernel.org, hpa@zytor.com, peterz@infradead.org, ravi.v.shankar@intel.com, vikas.shivappa@intel.com, tony.luck@intel.com, fenghua.yu@intel.com, andi.kleen@intel.com Subject: Re: [PATCH 13/21] x86/intel_rdt/cqm: Add cpus file support In-Reply-To: <1498503368-20173-14-git-send-email-vikas.shivappa@linux.intel.com> Message-ID: References: <1498503368-20173-1-git-send-email-vikas.shivappa@linux.intel.com> <1498503368-20173-14-git-send-email-vikas.shivappa@linux.intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 994 Lines: 35 On Mon, 26 Jun 2017, Vikas Shivappa wrote: > diff --git a/arch/x86/kernel/cpu/intel_rdt.h b/arch/x86/kernel/cpu/intel_rdt.h > index fdf3654..fec8ba9 100644 > --- a/arch/x86/kernel/cpu/intel_rdt.h > +++ b/arch/x86/kernel/cpu/intel_rdt.h > @@ -37,6 +37,8 @@ struct mon_evt { > extern bool rdt_alloc_enabled; > extern int rdt_mon_features; > > +DECLARE_PER_CPU_READ_MOSTLY(int, cpu_rmid); u32 > > +DEFINE_PER_CPU_READ_MOSTLY(int, cpu_rmid); > static inline struct rmid_entry *__rmid_entry(u32 rmid) Bah. Please add a new line between the DEFINE... and the function. But that whole thing is wrong. The per cpu default closid and rmid want to be in a single place, not in two distinct per cpu variables. struct rdt_cpu_default { u32 rmid; u32 closid; }; DEFINE_PER_CPU_READ_MOSTLY(struct rdt_cpu_default, rdt_cpu_default); or something like this. That way it's guaranteed that the context switch code touches a single cache line for the per cpu defaults. Thanks, tglx