Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752256AbdGDPTK (ORCPT ); Tue, 4 Jul 2017 11:19:10 -0400 Received: from smtp2-g21.free.fr ([212.27.42.2]:53820 "EHLO smtp2-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752052AbdGDPTJ (ORCPT ); Tue, 4 Jul 2017 11:19:09 -0400 Subject: Re: [PATCH v9 2/3] PCI: Add tango PCIe host bridge support To: Peter Zijlstra Cc: Marc Gonzalez , Bjorn Helgaas , Marc Zyngier , Thomas Gleixner , linux-pci , Linux ARM , LKML , Thibaud Cornic , Mark Rutland , Ard Biesheuvel , Greg Kroah-Hartman , Ingo Molnar , Daniel Thompson References: <987fac41-80dc-f1d0-ec0b-91ae57b91bfd@sigmadesigns.com> <20170702231811.GJ18324@bhelgaas-glaptop.roam.corp.google.com> <79382219-c730-da78-3e5f-5abf3173d7ac@sigmadesigns.com> <20170704070958.oolhapyx7uy2fly4@hirez.programming.kicks-ass.net> <20170704142758.GB7287@worktop> From: Mason Message-ID: Date: Tue, 4 Jul 2017 17:18:33 +0200 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:52.0) Gecko/20100101 Firefox/52.0 SeaMonkey/2.49.1 MIME-Version: 1.0 In-Reply-To: <20170704142758.GB7287@worktop> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2235 Lines: 68 On 04/07/2017 16:27, Peter Zijlstra wrote: > Mason wrote: > >> if (IS_ENABLED(CONFIG_DEBUG_PREEMPT) && in_atomic_preempt_off()) { >> pr_err("Preemption disabled at:"); >> print_ip_sym(preempt_disable_ip); >> pr_cont("\n"); >> } >> >> BTW, why didn't print_ip_sym(preempt_disable_ip); say >> where preemption had been disabled? > > It does, but it might be non-obvious. We only store the first 0->!0 > transition IP in there. The output was: [ 1.079483] Preemption disabled at:[ 1.082820] [< (null)>] (null) so preempt_disable_ip was NULL, right? Has it been already clobbered? >> Here's the high-level view. My HW is borked and muxes >> config space and mem space. So I need a way to freeze >> the entire system, make the config space access, and >> then return the system to normal. (AFAICT, config space >> accesses are rare, so if I kill performance for these >> accesses, the system might remain usable.) >> >> Is there a way to do this? Mark suggested stop_machine >> but it seems using it in my situation is not quite >> straight-forward. > > *groan*... so yeah, broken hardware demands crazy stuff... stop machine > is tricky here because I'm not sure we can demand all PCI accessors to > allow sleeping. > > And given that PCI lock is irqsave, we can't even assume IRQs are > enabled. > > Does your platform have NMIs? If so, you can do yuck things like the > kgdb sync. NMI IPI all other CPUs and have them spin-wait on your state. > > Then be careful not to deadlock when two CPUs do that concurrently. My platform is arch/arm/mach-tango (Cortex A9, ARMv7-A) This looks similar to what you described: https://www.linaro.org/blog/core-dump/debugging-arm-kernels-using-nmifiq/ (I CCed Daniel Thompson) Quote article: > Note: On ARMv7-A devices that have security extensions (TrustZone) > FIQ can only be used by the kernel if it is possible to run Linux in > secure mode. It is therefore not possible to exploit FIQ for > debugging and run a secure monitor simultaneously. At the end of this > blog post we will discuss potential future work to mitigate this > problem. On my platform, Linux runs in non-secure mode... Sounds like I don't have many options left for this driver :-( Regards.