Subject: Re: [PATCH 2/2] net: ethernet: fsl: add phy reset after clk enable
 option
To: Andrew Lunn <andrew@lunn.ch>
CC: <fugang.duan@nxp.com>, <robh+dt@kernel.org>, <mark.rutland@arm.com>,
        <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <dev@g0hl1n.net>
References: <1499346330-12166-1-git-send-email-richard.leitner@skidata.com>
 <1499346330-12166-2-git-send-email-richard.leitner@skidata.com>
 <20170706135557.GC8810@lunn.ch>
From: Richard Leitner <richard.leitner@skidata.com>
Message-ID: <109f44aa-87ed-6a9c-b557-8dabb2958c8c@skidata.com>
Date: Thu, 6 Jul 2017 16:33:47 +0200
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On 07/06/2017 03:55 PM, Andrew Lunn wrote:
>> diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt
>> index 6f55bdd..1766579 100644
>> --- a/Documentation/devicetree/bindings/net/fsl-fec.txt
>> +++ b/Documentation/devicetree/bindings/net/fsl-fec.txt
>> @@ -23,6 +23,9 @@ Optional properties:
>>  - phy-handle : phandle to the PHY device connected to this device.
>>  - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
>>    Use instead of phy-handle.
>> +- phy-reset-after-clk-enable : If present then a phy reset and configuration
>> +  will be performed everytime after the clocks are enabled. This is required
>> +  for some PHYs to work properly.
> 
> It sounds like this issue will apply to any LAN8710 which has its
> clock fiddled with. So this should be a centrally documented property,
> which any MAC driver can implement. Please move the above text to
> ethernet.txt, and instead have:
> 
>  - phy-reset-after-clk-enable : See ethernet.txt

I haven't tested it on any other platform than an i.MX6, but IMHO you're
right. It sounds reasonable that it affects any SoC which is messing
around with the clock and not performing a reset by default.

Thanks for that hint!
I'll include that in the v2.

>  Thanks
> 	 Andrew
> 

regards,
Richard.L