Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752618AbdGGH2N (ORCPT ); Fri, 7 Jul 2017 03:28:13 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:4778 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752521AbdGGH1r (ORCPT ); Fri, 7 Jul 2017 03:27:47 -0400 From: Ludovic Barre To: Thomas Gleixner , Jason Cooper , Marc Zyngier CC: Maxime Coquelin , Alexandre Torgue , , Subject: [PATCH 6/8] irqchip: stm32: move the wakeup on interrupt mask Date: Fri, 7 Jul 2017 09:26:29 +0200 Message-ID: <1499412391-25480-7-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499412391-25480-1-git-send-email-ludovic.Barre@st.com> References: <1499412391-25480-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.0.223] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-07-07_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1101 Lines: 38 From: Ludovic Barre move irq_set_wake on interrupt mask, needed to out of low power mode (wakeup source) Signed-off-by: Ludovic Barre --- drivers/irqchip/irq-stm32-exti.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index 3c7077d..f92c103 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -142,16 +142,16 @@ static int stm32_irq_set_wake(struct irq_data *data, unsigned int on) struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); struct stm32_exti_bank *stm32_bank = gc->private; int pin = data->hwirq % BITS_PER_LONG; - u32 emr; + u32 imr; irq_gc_lock(gc); - emr = irq_reg_readl(gc, stm32_bank->emr_ofst); + imr = irq_reg_readl(gc, stm32_bank->imr_ofst); if (on) - emr |= BIT(pin); + imr |= BIT(pin); else - emr &= ~BIT(pin); - irq_reg_writel(gc, emr, stm32_bank->emr_ofst); + imr &= ~BIT(pin); + irq_reg_writel(gc, imr, stm32_bank->imr_ofst); irq_gc_unlock(gc); -- 2.7.4